Abstract: An electrical receptacle connector includes a metallic shell, an insulated housing in the metallic shell, a plurality of terminals at the insulated housing, and a metallic plate. The terminals are arranged in two rows, and the metallic plate is at the insulated housing and between the terminals in the two rows. The metallic plate includes a through hole at a front portion of the tongue portion. The through hole has several through portions and a communication portion between the through portions. By allowing that the communication portion to be in communication with the through portions to form a through hole in an elongated shape, the molding efficiency for forming the tongue portion with the filling of the plastic materials can be increased.

Abstract: A light-emitting diode (LED) packaging module includes light-emitting units arranged in an array having m row(s) and n column(s), an encapsulating layer, and a wiring assembly, where m and n each independently represents a positive integer. Each of the light-emitting units includes LED chips each including a chip first surface, a chip second surface, a chip side surface, and an electrode assembly disposed on the chip second surface. The encapsulating layer covers the chip side surface and fills a space among the LED chips. The wiring assembly is disposed on the chip second surface and is electrically connected to the electrode assembly.

Abstract: Disclosed is an outdoor lighting system that utilizes a smart phone to control the outdoor lighting system. In addition, this system may include an ultrasonic audio generator for repelling bugs and other animals. Various lighting themes can be applied to the lamps using an application program stored on the smart phone. Bug lights to repel flying insects and UV lights can be included in the lamps to repel birds and other animals, including bats.

Abstract: A semiconductor device includes a semiconductor substrate having first and second regions therein, a first lower semiconductor pattern, which protrudes from the semiconductor substrate in the first region and extends in a first direction across the semiconductor substrate, and a first gate electrode, which extends across the first lower semiconductor pattern and the semiconductor substrate in a second direction. A plurality of semiconductor sheet patterns are provided, which are spaced apart from each other in a third direction to thereby define a vertical stack of semiconductor sheet patterns, on the first lower semiconductor pattern. A first gate insulating film is provided, which separates the plurality of semiconductor sheet patterns from the first gate electrode. A second lower semiconductor pattern is provided, which protrudes from the semiconductor substrate in the second region. A plurality of wire patterns are provided, which are spaced apart from each other on the second lower semiconductor pattern.

Abstract: Techniques are disclosed relating to multiway communications. In some embodiments, a first electronic device initiates a multiway call between a plurality of electronic devices and exchanges a first secret with a first set of electronic devices participating during a first portion of the multiway call, the first secret being used to encrypt traffic between the first set of electronic devices. The first electronic device receives an indication that first set of participating electronic devices has changed and, in response to the indication, exchanges a second secret with a second set of electronic devices participating during a second portion of the multiway call, the second secret being used to encrypt traffic between the second set of participating electronic devices. In some embodiments, the indication identifies a second electronic device as leaving the multiway call, and the second secret is not exchanged with the second electronic device.

Abstract: A method for manufacturing a stacked capacitor structure includes: forming a first patterned structure over a substrate; forming a first bottom electrode over the first patterned structure; depositing a first dielectric film over the first bottom electrode; depositing a first top electrode layer over the first dielectric film; forming a first vertical interconnect structure; forming a second patterned structure over the first top electrode layer; forming a second bottom electrode over the second patterned structure and electrically connected to the first bottom electrode through the first vertical interconnect structure; depositing a second dielectric film over the second bottom electrode; depositing a second top electrode layer over the second dielectric film; and forming a second vertical interconnect structure extending from the first top electrode layer. The second top electrode layer is electrically connected to the first top electrode layer through the second vertical interconnect structure.

Abstract: A method includes placing a plurality of package components over a carrier, encapsulating the plurality of package components in an encapsulant, forming a light-sensitive dielectric layer over the plurality of package components and the encapsulant, exposing the light-sensitive dielectric layer using a lithography mask, and developing the light-sensitive dielectric layer to form a plurality of openings. Conductive features of the plurality of package components are exposed through the plurality of openings. The method further includes forming redistribution lines extending into the openings. One of the redistribution lines has a length greater than about 26 mm. The redistribution lines, the plurality of package components, the encapsulant in combination form a reconstructed wafer.

Abstract: A method for manufacturing an electrically-conductive paste includes: bringing carbon nanotubes (CNT) and a solvent into contact with each other so that a wetting rate is 25 to 125%; kneading, by using a planetary stirring machine, a mixture containing the CNT and the solvent obtained by impregnating the CNT with the solvent, to obtain a kneaded product in a paste state; and then performing dispersion processing on a dilution obtained by mixing a solvent into the obtained kneaded product.

Abstract: This application provides a sensing method and a communication apparatus. A first device indicates at least one second device to perform a sensing task by using a midamble, and indicates a sensing parameter required by the at least one second device to perform the sensing task. This may enable the at least one second device to perform the sensing task by using the midamble sent by the first device, to implement sensing by using the midamble.

Abstract: A multilayer electronic component includes a body including dielectric layers and internal electrodes alternately disposed with the dielectric layers and external electrodes disposed on the body and connected to the internal electrodes. The one of the internal electrodes includes Ni, Ba, Ti, O, and Tb, and a content of Tb relative to a sum of contents of Ni, Ba, Ti, O, and Tb is 0.45 to 3.0 wt %.

Abstract: A key management device according to an embodiment is a key management device managing an application key for encrypting a communication in an application network including a plurality of applications. The key management device includes a hardware processor configured to function as a collection unit, a calculation unit, a determination unit, and a communication unit. The collection unit collects, using quantum key distribution (QKD), resource information indicating a resource of a link for which a link key is generated. The calculation unit calculates metric for a key relay route including the link on the basis of the resource information. The determination unit determines a key relay route from among a plurality of key relay routes on the basis of the metric. The communication unit uses the key relay route determined by the determination unit to send, to a destination, an application key encrypted with the link key.

Abstract: A method of manufacturing a semiconductor structure includes: forming a first oxide layer over a landing pad layer; forming a middle patterned dielectric layer over the first oxide layer; sequentially forming a second oxide layer and a top dielectric layer over the middle patterned dielectric layer; forming a trench through the top dielectric layer, the second oxide layer and the first oxide layer; conformally forming a bottom conductive layer in the trench; removing a portion of the top dielectric layer adjacent to the trench to expose a portion of the second oxide layer beneath the portion of the top dielectric layer; and performing an etching process to remove the second oxide layer and the first oxide layer. A semiconductor structure is also provided.

Abstract: Disclosed are pyrazole compounds, as well as pharmaceutical compositions and methods of use thereof. One embodiment is a compound having the structure and pharmaceutically acceptable salts, prodrugs and N-oxides thereof (and solvates and hydrates thereof), wherein A, X, Z, m, p, and R2 are as described herein. In certain embodiments, a compound disclosed herein inhibits the activity of one or more members of the TGF-? superfamily, and can be used to treat disease by blocking such activity.

Abstract: An illuminated keyswitch structure includes a base plate, a keycap, and a light-emitting die package. The keycap is movably disposed above the base plate in a vertical direction. The light-emitting die package is disposed under the keycap and includes a plurality of light-emitting dies. The plurality of light-emitting dies are monochromatic light-emitting dies. Therein, among the plurality of light-emitting dies, three light-emitting dies that are adjacently arranged in an arrangement direction perpendicular to the vertical direction emit light of three different colors. The arrangement direction is respectively parallel to along side of each of the three adjacent light-emitting dies.

Abstract: A display panel and a display apparatus are provided; the display panel is divided into a display region and a non-display region at least partially surrounding the display region; a fan-out region is provided in the non-display region; the display panel includes a substrate and a first power trace provided on the substrate; a first portion of the first power trace is provided in the fan-out region and configured to transmit a first power signal; and the first portion includes: a sheet-shaped trace proximal to an edge of the display panel, and a plurality of stripe-shaped traces spaced apart from one another and extending from the sheet-shaped trace toward the display region. According to the present disclosure, the first power trace in the fan-out region is configured to include the plurality of strip-shaped traces.

Abstract: An information processing device 1X mainly includes a slow motion video generation means 16X and a digest candidate generation means 18X. The slow motion video generation means 16X generates a slow motion video SL being video data in which a playback speed of the first candidate video data Cd1 is slower than a normal speed, with respect to first candidate video data Cd1 being video data corresponding to a segment of a portion selected from video material data Dm. Here, the digest candidate generation means 18X generates digest candidate Cd being a candidate of a digest of the video material data Dm based on the video material data Dm and the slow motion video SL.

Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Abstract: A memory device includes a first word line and a second word line. A first portion of the first word line is formed in a first metal layer, a second portion of the first word line is formed in a second metal layer above the first metal layer, and a third portion of the first word line is formed in a third metal layer below the second metal layer. A first portion of the second word line is formed in the first metal layer. A second portion of the second word line is formed in the second metal layer. The first portion, the second portion, and the third portion of the first word line have sizes that are different from each other, and the first portion and the second portion of the second word line have sizes that are different from each other.

Abstract: A capacitor includes cup-shaped lower electrodes disposed on a substrate, a capacitor dielectric layer conformally covering inner surfaces and outer surfaces of the cup-shaped lower electrodes, and a support layer disposed between outer surfaces of the cup-shaped lower electrodes to connect the cup-shaped lower electrodes. The capacitor further includes an annealed oxide layer, which is interposed between the inner surfaces of the cup-shaped lower electrodes and the capacitor dielectric layer, and is also interposed between a portion of the outer surfaces of the cup-shaped lower electrodes and the capacitor dielectric layer. A method for forming the capacitor is also provided.

Abstract: A cleaning device for removing contamination on a substrate holder used with an electroplating cell includes an arm, a cleaning agent supplier, a nozzle and a receiver. The cleaning agent supplier is coupled to the arm and configured to supply a cleaning agent. The nozzle is coupled to the cleaning agent supplier and configured to spray the cleaning agent onto the substrate holder to remove the contamination. The receiver is coupled to the arm and configured to receive the cleaning agent after the cleaning agent is sprayed onto the substrate holder.