Patents by Inventor Yuan Chun

Yuan Chun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967622
    Abstract: Embodiments provide a dielectric inter block disposed in a metallic region of a conductive line or source/drain contact. A first and second conductive structure over the metallic region may extend into the metallic region on either side of the inter block. The inter block can prevent etchant or cleaning solution from contacting an interface between the first conductive structure and the metallic region.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Patent number: 11966628
    Abstract: A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. A bit line corresponding to each vector data executes one time of bit-line-setup, and reads the MSB vector and the LSB vector of each vector data according to the bit line. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, and the effective bit number stored by each memory unit is less than 2.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: April 23, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Wei-Chen Wang, Han-Wen Hu, Yung-Chun Li, Huai-Mu Wang, Chien-Chung Ho, Yuan-Hao Chang, Tei-Wei Kuo
  • Patent number: 11961893
    Abstract: Improved conductive contacts, methods for forming the same, and semiconductor devices including the same are disclosed. In an embodiment, a semiconductor device includes a first interlayer dielectric (ILD) layer over a transistor structure; a first contact extending through the first ILD layer, the first contact being electrically coupled with a first source/drain region of the transistor structure, a top surface of the first contact being convex, and the top surface of the first contact being disposed below a top surface of the first ILD layer; a second ILD layer over the first ILD layer and the first contact; and a second contact extending through the second ILD layer, the second contact being electrically coupled with the first contact.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Publication number: 20240107599
    Abstract: A method to establish and activate an MA PDU session for data transmission over a selected access is proposed. UE initiates a UE-requested PDU session establishment procedure. Once the UE receives a PDU SESSION ESTABLISHMENT ACCEPT message with ATSSS container IE, the UE can consider the MA PDU session has been activated and user plane resources are successfully established on the selected access. A method to convert an SA PDU session to an MA PDU session for data transmission over a selected access is proposed. UE initiates a UE-requested PDU session modification procedure. Once the UE receives a PDU SESSION MODIFICATION COMMAND message with ATSSS container IE, the UE can consider the MA PDU session has been converted from the SA PDU session and user plane resources are successfully established on the selected access.
    Type: Application
    Filed: December 7, 2023
    Publication date: March 28, 2024
    Inventors: Yuan-Chieh Lin, Chien-Chun Huang Fu
  • Publication number: 20240107325
    Abstract: A computer system (such as a controller) that selects channels and/or channel widths for use during communication in a shared band of frequencies is described. During operation, the computer system may receive, associated with access points in a region (such as a zone), information specifying unavailable channels associated with the shared band of frequencies, where the unavailable channels are currently used by the access points. For example, the information may be included in access-point status reports from the access points. Then, based at least in part on the unavailable channels, the computer system may determine the channels and/or the channel widths for use by the access points during communication in the shared band of frequencies in the region. Next, the computer system may provide, addressed to the access points, second information specifying the determined channels and/or the channel width.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 28, 2024
    Applicant: ARRIS Enterprises LLC
    Inventors: Yuan-Yao Chang, Shao-Chun Wen
  • Patent number: 11937370
    Abstract: A base material is provided. A first patterned circuit layer and a second patterned circuit layer are formed on a first surface and a second surface of the base material. A first insulation layer and a metal reflection layer are provided on the first patterned circuit layer and a portion of the first surface exposed by the first patterned circuit layer, wherein the metal reflection layer covers the first insulation layer, and a reflectance of the metal reflection layer is substantially greater than or equal to 85%, there is no conductive material between the first patterned circuit layer and the metal reflection layer. A first ink layer is formed on the first insulation layer before the metal reflection layer is formed.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: March 19, 2024
    Assignee: UNIFLEX Technology Inc.
    Inventors: Cheng-I Tu, Ying-Hsing Chen, Meng-Huan Chia, Hsin-Ching Su, Yi-Chun Liu, Cheng-Chung Lai, Yuan-Chih Lee
  • Publication number: 20240079409
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first fin structure. The semiconductor device structure includes a first source/drain structure over the first fin structure. The semiconductor device structure includes a first dielectric layer over the first source/drain structure and the substrate. The semiconductor device structure includes a first conductive contact structure in the first dielectric layer and over the first source/drain structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer and the first conductive contact structure. The semiconductor device structure includes a first conductive via structure passing through the second dielectric layer and connected to the first conductive contact structure. A first width direction of the first conductive contact structure is substantially parallel to a second width direction of the first conductive via structure.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jyun-De WU, Te-Chih HSIUNG, Yi-Chun CHANG, Yi-Chen WANG, Yuan-Tien TU, Peng WANG, Huan-Just LIN
  • Publication number: 20240079263
    Abstract: A wafer container includes a frame, a door and at least a pair of shelves. The frame has opposite sidewalls. The pair of the shelves are respectively disposed and aligned on the opposite sidewalls of the frame. Various methods and devices are provided for holding at least one wafer to the shelves during transport.
    Type: Application
    Filed: February 22, 2023
    Publication date: March 7, 2024
    Inventors: Kai-Hung HSIAO, Chi-Chung JEN, Yu-Chun SHEN, Yuan-Cheng KUO, Chih-Hsiung HUANG, Wen-Chih CHIANG
  • Publication number: 20240072571
    Abstract: A wireless transmission module for transmitting energy or signals includes a first magnetically conductive element, a first coil assembly and a first adhesive element. The first coil assembly and the first magnetically conductive element are arranged along a main axis. The first adhesive element is configured to be adhered to the first coil assembly and the first magnetic conductive element. The first adhesive element is disposed between the first coil assembly and the first magnetically conductive element.
    Type: Application
    Filed: December 16, 2022
    Publication date: February 29, 2024
    Inventors: Feng-Lung CHIEN, Mao-Chun CHEN, Kun-Ying LEE, Yuan HAN, Tsang-Feng WU
  • Publication number: 20240061703
    Abstract: A transaction merging method for a first electronic device and a second electronic device. The transaction merging method comprises: (a) receiving a plurality of input transactions from the first electronic device; (b) setting a merge condition of the input transactions according to a transmission condition between the first electronic device and the second electronic device; (c) merging the input transactions according to the merge condition to generate at least one transaction group; and (d) transmitting the transaction group to the second electronic device.
    Type: Application
    Filed: August 9, 2023
    Publication date: February 22, 2024
    Applicant: MEDIATEK INC.
    Inventors: En-Shou Tang, Yuan-Chun Lin, Ming-Lun Hsieh, Chia-Yuan Chang
  • Publication number: 20240047857
    Abstract: A reconfigurable intelligent surface includes a radiant layer, a sensing feeding circuit layer, a processing layer and a controlling circuit layer. The radiant layer includes at least two antennas and a plurality of reflecting units. Each of the at least two antennas is configured for sensing a polarization, a frequency or a direction angle of an incident electromagnetic wave. The reflecting units are arranged to form a reflecting surface. The sensing feeding circuit layer is signally connected to the antennas. The processing layer is signally connected to the sensing feeding circuit layer, and the processing layer is configured to produce a controlling signal corresponding thereto. The controlling circuit layer is signally connected to the radiant layer and the processing layer, wherein the controlling circuit layer receives the controlling signal and controls the reflecting units according to the controlling signal to adjust and form a reflecting electromagnetic wave.
    Type: Application
    Filed: October 31, 2022
    Publication date: February 8, 2024
    Inventors: Chia-Chan CHANG, Sheng-Fuh CHANG, Shih-Cheng LIN, Yuan-Chun LIN, Wei-Lun HSU
  • Publication number: 20230411144
    Abstract: A method for forming a semiconductor device includes followings. A metal layer is formed to embedded in a first dielectric layer. An etch stop layer is formed over the metal layer and the first dielectric layer. A second dielectric layer is formed over the etch stop layer. A portion of the second dielectric layer is removed to expose a portion of the etch stop layer and to form a via by a dry etching process. The portion of the etch stop layer exposed by the second dielectric layer is removed to expose the metal layer and to form a damascene cavity by a wet etching process. A damascene structure is formed in the damascene cavity.
    Type: Application
    Filed: June 16, 2022
    Publication date: December 21, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Han Chen, Hung-Chun Chen, Yuan-Chun Chien, Wei Tse Hsu, Yu-Yu Chen, Chien-Chih Chiu
  • Patent number: 11786024
    Abstract: A mask storing device comprises a storing unit, a hook member, a stopper portion, a positioning member, and a flexible stopper member for storing a mask. A method to store a mask, which functions as a safe and hygienicway to allow users to store and take out the mask safely by only holding ear loops without touching the body of the mask.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: October 17, 2023
    Inventor: Yuan-Chun Lin
  • Patent number: 11784703
    Abstract: A system for diffraction of an electromagnetic wave includes a substrate, a transmission unit, and a plurality of antennas. The substrate is made of a second medium. The transmission unit is disposed on the substrate. The transmission unit has a plurality of transmission lines. Each of the transmission lines has a transmission line length that is associated with a first medium operation wavelength that is associated with an operation frequency. The transmission lines are connected successively. The antennas are disposed on the substrate, respectively.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: October 10, 2023
    Assignee: National Chung Cheng University
    Inventors: Sheng-Fuh Chang, Chia-Chan Chang, Shih-Cheng Lin, Yuan-Chun Lin
  • Patent number: 11747742
    Abstract: An apparatus for removing a photoresist layer from at least one alignment mark of a wafer is provided. The apparatus includes a holder, a solvent dispenser, and a suction unit. The holder is used to support the wafer, wherein the alignment mark is formed in a peripheral region of the wafer. The solvent dispenser is used to spray a solvent onto the photoresist layer on the alignment mark of the wafer to generate a dissolved photoresist layer. The suction unit is used to remove the dissolved photoresist layer and the solvent from the wafer through exhausting.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: September 5, 2023
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Yuan-Chun Chao, Tian-Wen Liao, Wei-Chuan Chen, Yi-Chang Chang, Yu-Ming Tseng
  • Patent number: 11739046
    Abstract: The present disclosure provides co-crystals of a lithium benzoate compound and a co-former compound of Formula (I) Also provided herein are methods of preparing the co-crystals and uses thereof in treating and/or reducing the risk for neuropsychiatric disorder (e.g., schizophrenia, psychotic disorders, depressive disorders, bipolar disorders, or neurogenerative disorders).
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: August 29, 2023
    Assignee: SyneuRx International (Taiwan) Corp.
    Inventors: Guochuan Emil Tsai, Ching-Cheng Wang, Tien-Lan Hsieh, Yuan-Chun Lo
  • Patent number: 11731928
    Abstract: Provided are co-crystals of a sodium benzoate compound and a co-former compound of Formula (I) Also provided herein are methods of preparing the co-crystals and uses thereof in treating and/or reducing the risk for a neuropsychiatric disorder (e.g., schizophrenia, psychotic disorders, depressive disorders, or Alzheimer's disease) or a glucose or lipid metabolic disorder (e.g., obesity, diabetes, hypercholesterolemia, hypertension, or hyperlipidemia).
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: August 22, 2023
    Assignee: SyneuRx International (Taiwan) Corp.
    Inventors: Guochuan Emil Tsai, Ching-Cheng Wang, Tien-Lan Hsieh, Yuan-Chun Lo
  • Patent number: 11715639
    Abstract: A method of manufacturing a semiconductor structure includes depositing a silicon layer over a substrate, removing a portion of the silicon layer to form a gate stack, and performing a hydrogen treatment on the gate stack to repair a plurality of voids in the stack structure.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: August 1, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yuan-Chun Sie, Po-Yi Tseng, Chien-Hao Chen, Ching-Lun Lai, David Sung, Ming-Feng Hsieh, Yi-Chi Huang
  • Publication number: 20230189530
    Abstract: A method of writing data to a Ferroelectric-FET (FeFET) based non-volatile memory device can be provided by applying a voltage pulse at a write voltage level with a write polarity at a gate electrode of a FeFET device with reference to a source electrode of the FeFET device, as a write operation to the FeFET device to establish a state for the FeFET device, changing the voltage pulse, directly after the write operation, to a non-zero bias voltage level with a bias polarity that is opposite to the write polarity, at the gate electrode with reference to the source electrode for a delay time to reduce neutralization of a trap state associated with the write operation of the FeFET device, and changing the voltage pulse, after the delay time, to a read voltage level as a read operation to the FeFET device to determine the state of the FeFET device established during the write operation.
    Type: Application
    Filed: December 8, 2022
    Publication date: June 15, 2023
    Inventors: ASIF KHAN, WINSTON CHERN, YUAN-CHUN LUO, NUJHAT TASNEEM, ZHENG WANG, SHIMENG YU
  • Patent number: 11621479
    Abstract: An electromagnetic wave transmission structure adapted to cause convergence of an electromagnetic wave includes a substrate and a transmission unit provided on the substrate and including an annular metal plate. The annular metal plate has a weighted average inner radius and a weighted average outer radius each related to the wavelength of the electromagnetic wave, the distance between the electromagnetic wave transmission structure and a focal point defined as the point of convergence of the electromagnetic wave, and the distance between the source of the electromagnetic wave and the focal point. The plural inner and outer radii of the annular metal plate have the same trend of variation. Each inner or outer radius corresponds to a weight related to the reference included angle formed between the inner or outer radius and a reference axis.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: April 4, 2023
    Assignee: National Chung Cheng University
    Inventors: Sheng-Fuh Chang, Chia-Chan Chang, Shih-Cheng Lin, Yuan-Chun Lin