Patents by Inventor Yuan-Chun SIE

Yuan-Chun SIE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and fabrication method therefor
    Patent number: 11715639
    Abstract: A method of manufacturing a semiconductor structure includes depositing a silicon layer over a substrate, removing a portion of the silicon layer to form a gate stack, and performing a hydrogen treatment on the gate stack to repair a plurality of voids in the stack structure.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: August 1, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yuan-Chun Sie, Po-Yi Tseng, Chien-Hao Chen, Ching-Lun Lai, David Sung, Ming-Feng Hsieh, Yi-Chi Huang
  • Polishing pad, method for manufacturing polishing pad, and polishing method
    Patent number: 11597053
    Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: March 7, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hao Huang, Hsuan-Pang Liu, Yuan-Chun Sie, Pinyen Lin, Cheng-Chung Chien
  • POLISHING PAD, METHOD FOR MANUFACTURING POLISHING PAD, AND POLISHING METHOD
    Publication number: 20190099856
    Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.
    Type: Application
    Filed: November 30, 2018
    Publication date: April 4, 2019
    Inventors: Chi-Hao HUANG, Hsuan-Pang LIU, Yuan-Chun SIE, Pinyen LIN, Cheng-Chung CHIEN
  • Polishing pad, method for manufacturing polishing pad, and polishing method
    Patent number: 10189143
    Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: January 29, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Chi-Hao Huang, Hsuan-Pang Liu, Yuan-Chun Sie, Pinyen Lin, Cheng-Chung Chien
  • SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR
    Publication number: 20180151372
    Abstract: A method of manufacturing a semiconductor structure includes depositing a silicon layer over a substrate, removing a portion of the silicon layer to form a gate stack, and performing a hydrogen treatment on the gate stack to repair a plurality of voids in the stack structure.
    Type: Application
    Filed: September 12, 2017
    Publication date: May 31, 2018
    Inventors: Yuan-Chun SIE, Po-Yi TSENG, Chien-Hao CHEN, Ching-Lun LAI, David SUNG, Ming-Feng HSIEH, Yi-Chi HUANG
  • POLISHING PAD, METHOD FOR MANUFACTURING POLISHING PAD, AND POLISHING METHOD
    Publication number: 20170151648
    Abstract: A polishing pad for a chemical-mechanical polishing apparatus includes a first support layer and a polishing layer. The polishing layer is present on the first support layer. The polishing layer has a top surface that faces away from the first support layer and at least one first cavity that is buried at least beneath the top surface of the polishing layer.
    Type: Application
    Filed: May 18, 2016
    Publication date: June 1, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hao HUANG, Hsuan-Pang LIU, Yuan-Chun SIE, Pinyen LIN, Cheng-Chung CHIEN