Patents by Inventor Yuan Fang

Yuan Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240134711
    Abstract: Disclosed are a quantum computer operating system and a quantum computer. In the operating system, if the quantity of the free qubits on a certain chip in the quantum chip cluster is not less than the quantity required by the quantum computing task, selecting a first quantum bit whose reading fidelity is within a preset range from the free qubits and obtaining a nearby pair of quantum bits based on the community detection algorithm and the greedy algorithm, and combining them to form a qubit topological structure until the number of quantum bits is equal to the number required by the quantum computing task. Finally, mapping the quantum computing task to be processed with the qubit topological structure to execute the quantum computing task to be processed.
    Type: Application
    Filed: December 29, 2023
    Publication date: April 25, 2024
    Applicant: Origin Quantum Computing Technology (Hefei) Co., Ltd.
    Inventors: Yuan Fang, Wentao Wang, Dongyi Zhao, Jing Wang, Menghan Dou
  • Publication number: 20240118178
    Abstract: A staining kit is provided, including a first pattern including antibodies against T cell, B cell, NK cell, monocyte, regulatory cell, CD8, CD45, and CTLA4; a second pattern including antibodies against T cell, B cell, NK cell, monocyte, regulatory cell, dendritic cell, and CD45; a third pattern including antibodies against T cell, B cell, NK cell, monocyte, CD8, CD45, CD45RA, CD62L, CD197, CX3CR1 and TCR??; and a fourth pattern including antibodies against B cell, CD23, CD38, CD40, CD45 and IgM, wherein the antibodies of each pattern are labeled with fluorescent dyes. A method of identifying characterized immune cell subsets of a disease and a method of predicting the likelihood of NPC in a subject in the need thereof using the staining kit are also provided.
    Type: Application
    Filed: October 5, 2022
    Publication date: April 11, 2024
    Applicant: FULLHOPE BIOMEDICAL CO., LTD.
    Inventors: Jan-Mou Lee, Li-Jen Liao, Yen-Ling Chiu, Chih-Hao Fang, Kai-Yuan Chou, Pei-Hsien Liu, Cheng-Yun Lee
  • Publication number: 20240104787
    Abstract: Techniques are described with respect to a system, method, and computer product for enhancement of socialization between one or more individuals wearing personal protective equipment. An associated method includes identifying a plurality of social communications between one or more individuals wearing personal protective equipment (PPE) and assigning an identifier to a participant associated with at least one of the social communications. The method further includes analyzing content of the at least one social communication and generating an augmented reality (AR) based representation of the content for presentation on an augmented reality device associated with the user, the augmented reality device presenting the content for visualization replacing PPE based at least in-part on the identifier.
    Type: Application
    Filed: September 26, 2022
    Publication date: March 28, 2024
    Inventors: Yuan Yuan Ding, Zhong Fang Yuan, Tong Liu, Si Tong Zhao, Yi Chen Zhong, Ziqiumin Wang
  • Publication number: 20240104285
    Abstract: A method is provided and includes several operations: arranging multiple channels extending in a first direction; arranging, in accordance with multiple weights of multiple macros, a first portion of the macro closer to a centroid of a core region of an integrated circuit than a second portion of the macros; and arranging the macros on opposite sides of the channels. The macros have multiple pins coupled to the channels interposed between the macros.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Yi-Lin CHUANG, Shi-Wen TAN, Song LIU, Shih-Yao LIN, Wen-Yuan FANG
  • Publication number: 20240096833
    Abstract: A semiconductor structure and a method for manufacturing the same are disclosed. The semiconductor structure includes a substrate, a chip stack disposed on the substrate through a plurality of first conductive structures. Each of the plurality of the first conductive structures includes a first conductive bump, and the first conductive bump includes at least one concave surface. Concave surfaces of adjacent first conductive bumps are disposed facing each other.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 21, 2024
    Inventors: Yuan FANG, Yanwu WANG
  • Publication number: 20240096853
    Abstract: A semiconductor structure includes a plurality of dies. The plurality of dies are stacked sequentially along a first direction. The first direction is a direction perpendicular to a plane of the dies. Each of the dies includes a base and n first conductive structures penetrating the base along the first direction, where n is greater than or equal to 2. In at least one group of the corresponding first conductive structures in the dies, projections of the group of the first conductive structures in two adjacent layers of the dies along the first direction are not overlapped with each other.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Yuan FANG, Yanwu WANG
  • Publication number: 20240096754
    Abstract: A semiconductor structure includes a base, a chip stack located on the base, and first conductive structures. The chip stack includes chips stacked in sequence in a direction perpendicular to a plane of the base, a chip includes first and second sub-portions, a first surface of the first sub-portion is flush with that of the second sub-portion, a second surface of the first sub-portion protrudes from that of the second sub-portion, and the first and second surfaces are oppositely arranged. A first conductive structure includes a first conductive bump and a first through-silicon via, the first conductive bump is located between first sub-portions of two adjacent chips, the first through-silicon via penetrates through the first sub-portion in the direction perpendicular to the plane of the base and is connected to the first conductive bump, and the materials of the first conductive bump and the first through-silicon via are same.
    Type: Application
    Filed: August 8, 2023
    Publication date: March 21, 2024
    Inventors: Yuan FANG, Yanwu WANG
  • Publication number: 20240095563
    Abstract: The present disclosure provides a quantum convolution operator, comprising: a quantum state encoding module, a quantum entanglement module, a quantum convolution kernel module, a measuring module, and a computing module; the quantum state encoding module is configured to encode a current group of input data onto qubits; the quantum entanglement module is configured to associate quantum state information of different qubits; the quantum convolution kernel module is configured to extract feature information corresponding to the quantum state information; the measuring module is configured to measure a quantum state of a preset qubit and obtain a corresponding amplitude; the computing module is configured to compute a convolution result corresponding to the current group of input data according to the measured quantum state and its amplitude.
    Type: Application
    Filed: February 23, 2022
    Publication date: March 21, 2024
    Applicant: ORIGIN QUANTUM COMPUTING TECHNOLOGY (HEFEI) CO., LTD.
    Inventors: Menghan Dou, Yuan Fang, Zhaohui Zhou, Hanchao Wang, Lei Li
  • Patent number: 11929547
    Abstract: A mobile device includes a system circuit board, a metal frame, one or more other antenna elements, a display device, a first feeding element, and an RF (Radio Frequency) module. The system circuit board includes a system ground plane. The metal frame at least includes a first portion and a second portion. The metal frame at least has a first cut point positioned between the first portion and the second portion. The metal frame further has a second cut point for separating the other antenna elements from the first portion. The first cut point is arranged to be close to a middle region of the display device. The first feeding element is directly or indirectly electrically connected to the first portion. A first antenna structure is formed by the first feeding element and the first portion.
    Type: Grant
    Filed: April 7, 2023
    Date of Patent: March 12, 2024
    Assignee: HTC Corporation
    Inventors: Tiao-Hsing Tsai, Chien-Pin Chiu, Hsiao-Wei Wu, Li-Yuan Fang, Shen-Fu Tzeng, Yi-Hsiang Kung
  • Publication number: 20240061724
    Abstract: A quantum computing task execution method and apparatus, and a quantum computer operating system are applied to a first electronic device including a quantum chip. First physical qubits in the quantum chip are assigned to execute a first quantum computing task. The method includes: acquiring a current topological structure of the quantum chip; acquiring a second quantum computing task in a task queue; determining second physical qubits based on the current topological structure and the second quantum computing task, wherein the second physical qubits and the first physical qubits do not interfere with each other; and assigning the second physical qubits to execute the second quantum computing task. According to some embodiments of the present disclosure, parallel computing of a plurality of quantum computing tasks can be realized during quantum computing.
    Type: Application
    Filed: October 26, 2023
    Publication date: February 22, 2024
    Inventors: Dongyi Zhao, Yuan Fang, Menghan Dou, Jing Wang
  • Patent number: 11893334
    Abstract: A method is provided and includes several operations: forming a first group of macros in a first region, wherein the first group of macros are aligned with a first boundary of a channel that is coupled thereto through pins of the first group of macros; forming a second group of macros in the first region to align with a second boundary of the channel that is coupled thereto through pins of the second group of macros, wherein the first and second groups of macros are coupled to a first register; and forming a third group of macros in a second region different from the first region. A first macro and a second macro that are in the third group of macros are aligned with the first and second boundaries respectively. The third group of macros are coupled to a second register different from the first register.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: February 6, 2024
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Yi-Lin Chuang, Shi-Wen Tan, Song Liu, Shih-Yao Lin, Wen-Yuan Fang
  • Patent number: 11873247
    Abstract: Disclosed is a method for preparing an uncalcined geopolymer-based refractory material. The method includes the steps of mixing a mineral powder, a fly ash, a metakaolin, and silicon carbide whiskers by ball milling to form a milled material; mixing the milled material with a sodium water glass solution and water to form a slurry; and curing the slurry to obtain the uncalcined geopolymer-based refractory material. The uncalcined geopolymer-based refractory material thus prepared contains a geopolymer matrix formed of the mineral powder, the fly ash, and the metakaolin and the silicon carbide whiskers embedded in the geopolymer matrix.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: January 16, 2024
    Assignee: Shenzhen University
    Inventors: Yuan Fang, Feng Xing, Aoxuan Wang
  • Publication number: 20240013473
    Abstract: A method for three dimensional medical image construction having steps of inputting multiple two-dimensional images and a known three-dimensional image into a processing module and inputting a new two-dimensional image into the processing module to obtain a reconstructed three-dimensional image, wherein the processing module utilizes a neural network to build a reconstructed three-dimensional image by unfolding the two-dimensional image to produce a three-dimensional reconstruction.
    Type: Application
    Filed: June 16, 2023
    Publication date: January 11, 2024
    Inventors: Yi-Wen Chen, Cheng-Ting Shih, Kui-Chou Huang, Hsin-Yuan Fang, Kai-Cheng Hsu
  • Patent number: 11870772
    Abstract: An identity authenticator receives a first authentication credential from a first application at a first computing device. The identity authenticator then determines that the first authentication credential is associated with a second authentication credential for the first application at a second computing device based on a stored authentication identity. The identity authenticator then provides a stored execution state for the first application to the first computing device, wherein the stored execution state is associated, based on the stored authentication identity, with at least one of the first authentication credential or the second authentication credential.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: January 9, 2024
    Assignee: Electronic Arts Inc.
    Inventors: Lin Yang, Anand Nair, Gregory William Schaefer, Yuan Fang, Danjun Xing, Shengyong Li, Chuan Ye
  • Patent number: 11866368
    Abstract: An uncalcined geopolymer-based refractory material is provided, comprising a matrix of a geopolymer obtainable by polymerization of a mixture consisting of mineral powder, fly ash, and metakaolin; and SiC whiskers embedded in the geopolymer matrix. The material has excellent mechanical properties and high resistance to high temperatures and exhibits a ductile fracture mechanism instead of a brittle fracture mechanism.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: January 9, 2024
    Assignee: Shenzhen University
    Inventors: Feng Xing, Yuan Fang, Aoxuan Wang
  • Publication number: 20230420558
    Abstract: A semiconductor device and a manufacturing method thereof is provided. The device includes a semiconductor layer having a first and second surface opposing each other; a trench gate in the semiconductor layer, extends in a first direction parallel to the first and second surface, and from the first surface to an interior of the layer, and has a gate open end distant from the second surface; a source region of a first conductivity type and a channel region of a second conductivity type, orthographic projections of the source region and the channel region on the second surface at least partially overlap with each other in a depth direction of the trench gate, the source region having a source open end distant from the second surface, and the farther the source open end is from the second surface, the smaller a width of the source open end in the second direction.
    Type: Application
    Filed: June 23, 2023
    Publication date: December 28, 2023
    Applicants: Nexperia Technology (Shanghai) Ltd., NEXPERIA B.V.
    Inventors: Xukun Zhang, Chunlin Zhu, Ke Jiang, Huiling Zuo, Junli Xiang, Jinshan Shi, Yuan Fang
  • Patent number: 11853675
    Abstract: A method is provided and includes several operations: arranging multiple channels extending in a first direction; arranging, in accordance with multiple weights of multiple macros, a first portion of the macro closer to a centroid of a core region of an integrated circuit than a second portion of the macros; and arranging the macros on opposite sides of the channels. The macros have multiple pins coupled to the channels interposed between the macros.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: December 26, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Yi-Lin Chuang, Shi-Wen Tan, Song Liu, Shih-Yao Lin, Wen-Yuan Fang
  • Publication number: 20230402871
    Abstract: A dual-input power switching system includes a first DC power source, a second DC power source, a DC conversion circuit, and a boost-up circuit. The first DC power source provides a first DC voltage, and the second DC power source provides a second DC voltage. The DC conversion circuit receives the first DC voltage or the second DC voltage being an input voltage, and converts the input voltage to supply power to a load. The boost-up circuit provides a hold-up voltage to boost up the input voltage when the first DC power source stops supplying power to lead to power drop of the input voltage, such that the input voltage reaches to a specific voltage that is greater than the second DC voltage and afterward naturally decreases to be less than or equal to the second DC voltage.
    Type: Application
    Filed: August 11, 2022
    Publication date: December 14, 2023
    Inventors: Yuan-Fang LEE, Chang-Chih CHEN, Chih-Chiang CHAN
  • Publication number: 20230361172
    Abstract: A semiconductor device and a method for manufacturing the same is provided. The semiconductor device includes: a semiconductor body having a first surface and a second surface, the semiconductor body includes: a depletion region, a drift region having a first conductivity type, an island region having the first conductivity type, a buffer region having the first conductivity type, the drift region is more proximal to the first surface of the semiconductor body than the buffer region, the depletion region is located within the drift region, and the island region is located within the drift region, an ion concentration of the first conductivity type of the island region is higher than an ion concentration of the first conductivity type of the drift region.
    Type: Application
    Filed: May 2, 2023
    Publication date: November 9, 2023
    Applicants: Nexperia Technology (Shanghai) Ltd., NEXPERIA B.V.
    Inventors: Chunlin Zhu, Ke Jiang, Junli Xiang, Huiling Zuo, Xukun Zhang, Jinshan Shi, Yuan Fang
  • Patent number: 11805222
    Abstract: A method, an apparatus, and a non-transitory computer readable medium for visualizing infrared radiation strength includes obtaining infrared radiation (IR) image data transmitted by a light sensor; determining a radiation strength distribution and a module emitting mode corresponding to the IR image data; based on the radiation strength distribution and the module emitting mode, determining whether the IR image data meets a predetermined standard; when it is determined that the IR image data meets the predetermined standard, applying a gray processing to the IR image data to obtain a strength gray image; and applying color modulation to the strength gray image to generate a visual energy distribution image.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: October 31, 2023
    Assignees: HONGFUJIN PRECISION ELECTRONICS (ZHENGZHOU) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Wen-Biao Tian, Yuan-Fang Du