Patents by Inventor Yuan HOU

Yuan HOU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142394
    Abstract: Disclosed are a material analysis method based on the crystal structure database, a system, a computer-readable storage medium and an application. The material analysis method includes comparing experimental pattern information obtained from examination of a to-be-tested sample with theoretical pattern information calculated from material structure data in the crystal structure database, and obtaining crystallographic information and phase composition of the to-be-tested sample through intelligent analysis. The crystallographic information include space group, unit cell parameter, and specific coordinates of atoms in unit cell. The crystal structure database has material structure data obtained by experimental measurement and/or theoretical prediction, including chemical formula, space group, unit cell parameter and specific coordinates of atoms in unit cell.
    Type: Application
    Filed: July 30, 2021
    Publication date: May 2, 2024
    Inventors: Feng PAN, Shunning LI, Cheng DONG, Wentao ZHANG, Chenxin HOU, Litao CHEN, Junjie PAN, Shisheng ZHENG, Yuan LIN, Hai LIN
  • Publication number: 20240135078
    Abstract: Systems, methods, and computer programs products are described for optimizing circuit synthesis for implementation on an integrated circuit. A register transfer level code description of logic behavior of a circuit. The register transfer level code description is converted into structurally defined circuit designs for multiple types of components and feature size technologies. A floor plan of each structurally defined circuit design is generated. A physically simulated circuit is created for each floor plan. A range of operating conditions is swept over to analyze power, performance, and area of each physically simulated circuit.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Inventors: Chao-Chun Lo, Boh-Yi Huang, Chih-yuan Stephen Yu, Yi-Lin Chuang, Chih-Sheng Hou
  • Publication number: 20240105696
    Abstract: A display panel includes a substrate and display pixels. The display pixels are disposed on the substrate, and each of the display pixels includes pad sets, light-emitting devices, a first connecting wire, a second connecting wire, and first cutting regions. Each pad set has a first pad and a second pad. The light-emitting devices are electrically bonded to at least part of the pad sets. The first connecting wire is electrically connected to the first pads of a plurality of first pad sets of the pad sets. The second connecting wire is electrically connected to the second pads of the pad sets. The first cutting regions are disposed on one side of each of the first pad sets. Two first connecting portions of the first connecting wire and the second connecting wire connecting each of the first pad sets are located in one of the first cutting regions.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Applicant: AUO Corporation
    Inventors: Cheng-He Ruan, Jian-Jhou Tseng, Chih-Yuan Hou
  • Publication number: 20240099111
    Abstract: There is provided a display substrate, including: a base; light-emitting units on a side of the base; a flat light-shielding functional layer, including a black matrix and a first planarization layer, on a side of the light-emitting units away from the base, light outgoing openings being provided in the black matrix and being in one-to-one correspondence with the light-emitting units, and the first planarization layer at least filling the light outgoing openings; and a color filter layer, including color filter patterns in one-to-one correspondence with the light outgoing openings, on a side of the flat light-shielding functional layer away from the base, an orthographic projection of each color filter pattern on the base covering an orthographic projection of the light outgoing opening corresponding to the color filter pattern on the base. A method for manufacturing a display substrate, a display panel and a display apparatus are further provided.
    Type: Application
    Filed: July 1, 2022
    Publication date: March 21, 2024
    Inventors: Peng HOU, Yuan HE, Huaisen REN, Zhiliang SHAO, Pei LIU, Xiaoyi WANG, Chao YE, Yi PENG
  • Publication number: 20240096719
    Abstract: A semiconductor device includes a first substrate, an electronic component, and a lid. The first substrate includes a first substrate top side, a first substrate bottom side opposite to the first substrate top side, a first substrate lateral side interposed between the first substrate top side and the first substrate bottom side, and a connector structure. The electronic component is coupled to the first substrate top side and coupled to the connector structure. The lid includes a wall part including a ring part coupled to the first substrate top side, a first part of an overhang part coupled to the first substrate lateral side, and a second part of the overhang part extending from the first part of the overhang part away from the first substrate lateral side.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Yu Huang, Sung-Hui Huang, Shang-Yun Hou, Chien-Yuan Huang
  • Patent number: 11923205
    Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: March 5, 2024
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Kun-Ju Li, Ang Chan, Hsin-Jung Liu, Wei-Xin Gao, Jhih-Yuan Chen, Chun-Han Chen, Zong-Sian Wu, Chau-Chung Hou, I-Ming Lai, Fu-Shou Tsai
  • Patent number: 11922058
    Abstract: Embodiments of a three-dimensional (3D) memory device and a method of operating the 3D memory device are provided. The 3D memory device includes an array of 3D NAND memory cells, an array of static random-access memory (SRAM) cells, and a peripheral circuit. The array of SRAM cells and the peripheral circuit arranged at one side are bonded with the array of 3D NAND memory cells at another side to form a chip. Data is received from a host through the peripheral circuit, buffered in the array of SRAM cells, and transmitted from the array of SRAM cells to the array of 3D NAND memory cells. The data is programmed into the array of 3D NAND memory cells.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: March 5, 2024
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Yue Ping Li, Wei Jun Wan, Chun Yuan Hou
  • Publication number: 20240071988
    Abstract: A method for manufacturing a semiconductor structure is provided. The method includes: providing a substrate and a dielectric layer on the substrate; forming a hole in the dielectric layer; forming an initial barrier material layer and a conductive layer on an upper surface of the dielectric layer and in the hole; removing part of the initial barrier material layer and part of the conductive layer to form a barrier material layer and a via element in the hole respectively and expose the upper surface of the dielectric layer. An upper surface of the barrier material layer is higher than the upper surface of the dielectric layer.
    Type: Application
    Filed: October 11, 2022
    Publication date: February 29, 2024
    Inventors: Kun-Ju LI, Hsin-Jung LIU, Wei-Xin GAO, Jhih-Yuan CHEN, Ang CHAN, Chau-Chung HOU
  • Patent number: 11908813
    Abstract: A display device having a non-display region is provided. The display device includes a first conductive line to which a voltage is applied and a second conductive line which is at least partially overlapped with the first conductive line. There is a distance between the first conductive line and the second conductive line in a normal direction of the display device is greater than or equal to 3500 angstroms, and less than or equal to 4500 angstroms.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: February 20, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tsung-Lun Tsai, Bo-Yuan Hou
  • Patent number: 11876086
    Abstract: A display panel includes a substrate and display pixels. The display pixels are disposed on the substrate, and each of the display pixels includes pad sets, light-emitting devices, a first connecting wire, a second connecting wire, and first cutting regions. Each pad set has a first pad and a second pad. The light-emitting devices are electrically bonded to at least part of the pad sets. The first connecting wire is electrically connected to the first pads of a plurality of first pad sets of the pad sets. The second connecting wire is electrically connected to the second pads of the pad sets. The first cutting regions are disposed on one side of each of the first pad sets. Two first connecting portions of the first connecting wire and the second connecting wire connecting each of the first pad sets are located in one of the first cutting regions.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: January 16, 2024
    Assignee: Au Optronics Corporation
    Inventors: Cheng-He Ruan, Jian-Jhou Tseng, Chih-Yuan Hou
  • Publication number: 20230411893
    Abstract: The disclosure provides a mini type FAKRA connector, which includes a metal housing, a plastic housing, a pin, and multiple terminals. The plastic housing is assembled to the metal housing, and a portion structure of the metal housing and a portion structure of the plastic housing are overlapped to form a tunnel. The pin is inserted into the tunnel to fix the metal housing and the plastic housing together. The terminals penetrate the metal housing and the plastic housing.
    Type: Application
    Filed: June 1, 2023
    Publication date: December 21, 2023
    Applicant: Advanced Connectek Inc.
    Inventors: Jiaqi Li, Qihui Zhu, Pin-Yuan Hou, Jia Chen
  • Publication number: 20230320003
    Abstract: An example display assembly includes: a continuous display including: a first rigid segment attached to and substantially coplanar with an inner surface of a first assembly of the folding device; a second rigid segment attached to and substantially coplanar with an inner surface of a second assembly of the folding device; a primary flexible segment; a third rigid segment disposed between the second rigid segment and the primary flexible segment; and a fourth rigid segment disposed between the first rigid segment and the primary flexible segment; a primary supporting plate attached to the continuous display; a first supplemental supporting plate attached to the primary supporting plate adjacent to the third rigid segment; and a second supplemental supporting plate attached to the primary supporting plate adjacent to the fourth rigid segment.
    Type: Application
    Filed: September 7, 2021
    Publication date: October 5, 2023
    Inventors: Adrian Gheorghe Menea, Yi Taio, Kiarash Vakhshouri, Taesung Kim, Yiting Liu, Micheal Lombardi, Hao-Yuan Hou
  • Patent number: 11735243
    Abstract: Embodiments of 3D memory devices with a static random-access memory (SRAM) and fabrication methods thereof are disclosed herein. In certain embodiments, the 3D memory device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes an array of SRAM cells and a first bonding layer, and the second semiconductor structure includes an array of 3D NAND memory strings and a second bonding layer. The first semiconductor structure is attached with the second semiconductor structure through the first bonding layer and the second bonding layer. The array of 3D NAND memory strings and the array of SRAM cells are coupled through a plurality of bonding contacts in the first bonding layer and the second bonding layer and are arranged at opposite sides of the plurality of bonding contacts.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: August 22, 2023
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Yue Ping Li, Chun Yuan Hou
  • Publication number: 20230233489
    Abstract: The present invention provides methods, compositions, combinations, and kits for treating a subject with a viral infection (e.g., COVID-19) by administering or providing an estrogen receptor modulator and an anti-inflammatory agent or by administering or providing an anti-inflammatory agent (e.g., melatonin) to the subject.
    Type: Application
    Filed: June 18, 2021
    Publication date: July 27, 2023
    Inventors: Feixiong Cheng, Reena Mehra, Sujata Rao, Yadi Zhou, Yuan Hou
  • Publication number: 20230170646
    Abstract: An electrical connector including a plurality of terminals, a first insulating body, a second insulating body, a shell, and a waterproof member is provided. The terminals are respectively retained in the first insulating body and the second insulating body. The shell is sheathed to the first insulating body and the second insulating body. The shell has a front edge and a rear edge opposite to each other along an insertion direction. The front edge is used for mating another electrical connector. At least one opening is formed by the rear edge and the second insulating body. The first insulating body and the second insulating body are separated from each other. A space is formed by the first insulating body, the second insulating body, and the shell. The space is communicated with an external environment via the at least one opening. The waterproof member is filled into the space.
    Type: Application
    Filed: November 24, 2022
    Publication date: June 1, 2023
    Applicant: Advanced Connectek Inc.
    Inventors: Yubin Li, Yao Mei Wang, Guan Liao, Pin-Yuan Hou, Shu-Fen Wang
  • Publication number: 20230170645
    Abstract: An electrical connector, including an insulating body, multiple terminals, a metal shell, a collar, and a water-proof glue, is provided. The terminals are disposed in the insulating body. The metal shell is disposed outside the insulating body and surrounds the insulating body and the terminals. The collar is sleeved onto an outer wall of the metal shell. The collar has a first plate portion, a second plate portion, and a bending portion. The bending portion is connected between the first plate portion and the second plate portion. The first plate portion is connected to the outer wall of the metal shell, and the second plate portion is away from the outer wall of the metal shell. The water-proof glue is disposed between the second plate portion of the collar and the bending portion and the outer wall of the metal shell.
    Type: Application
    Filed: November 23, 2022
    Publication date: June 1, 2023
    Applicant: Advanced Connectek Inc.
    Inventors: Yubin Li, Qihui Zhu, Pin-Yuan Hou, Shu-Fen Wang
  • Publication number: 20230104592
    Abstract: An electrical connector including an insulating body, multiple terminals, a shell, and a sealing adhesive is provided. The terminals are disposed in the insulating body. The shell is assembled to the insulating body. The shell has an insulative exterior shell, surrounding the insulating body and the terminals. Portions of the insulating body and the terminals protruding from a front side of the insulative exterior shell are configured to be connected to another electrical connector. The sealing adhesive is filled between the shell and the insulating body and located at a rear side of the insulative exterior shell.
    Type: Application
    Filed: September 28, 2022
    Publication date: April 6, 2023
    Applicant: Advanced Connectek Inc.
    Inventors: Pin-Yuan Hou, Yubin Li, Shu-Fen Wang
  • Publication number: 20230066211
    Abstract: A display device having a non-display region is provided. The display device includes a first conductive line to which a voltage is applied and a second conductive line which is at least partially overlapped with the first conductive line. There is a distance between the first conductive line and the second conductive line in a normal direction of the display device is greater than or equal to 3500 angstroms, and less than or equal to 4500 angstroms.
    Type: Application
    Filed: November 8, 2022
    Publication date: March 2, 2023
    Inventors: Tsung-Lun TSAI, Bo-Yuan HOU
  • Publication number: 20220413771
    Abstract: A three-dimensional (3D) memory device includes a 3D NAND memory array, an on-die static random-access memory (SRAM), and peripheral circuits formed on the same chip with the on-die SRAM. The peripheral circuits include a page buffer coupled to the on-die SRAM and a controller coupled to the on-die SRAM and the page buffer. The controller may be configured to load program data into the page buffer and cache the program data into the on-die SRAM as a backup copy of the program data. In response to a status of programming the program data from the page buffer into the 3D NAND memory array being failed, the controller may be further configured to transmit the backup copy of the program data in the on-die SRAM to the page buffer, and program the backup copy of the program data in the page buffer into the 3D NAND memory array.
    Type: Application
    Filed: September 7, 2022
    Publication date: December 29, 2022
    Inventors: Yue Ping Li, Chun Yuan Hou
  • Patent number: 11521942
    Abstract: A display device is provided. The display device includes a panel. The panel includes a display region and a non-display region and has a normal direction in which the non-display region is adjacent to the display region. The non-display region includes a first conductive line and a second conductive line. A common voltage is applied to the first conductive line. The second conductive line is at least partially overlapped with the first conductive line. There is a distance between the first conductive line and the second conductive line in the normal direction. The distance is greater than or equal to 3500 ?, and less than or equal to 4500 ?.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: December 6, 2022
    Assignee: INNOLUX CORPORATION
    Inventors: Tsung-Lun Tsai, Bo-Yuan Hou