Abstract: A multi-threaded memory system including a plurality of entries, each one of the plurality of entries including a plurality of threads, each one of the plurality of threads including an active cell and a shared read cell. The shared read cell has an output coupled to a read bit line and a corresponding plurality of inputs coupled to an output of the corresponding active cells in each one of the plurality of threads. A multi-threaded memory system is also described.

Abstract: Disclosed is a system for automatically generating tables of buffer data which can be used during integrated circuit design to select appropriate buffers for signal distribution networks. The generated buffer data may be used by automated place and route systems to generate signal distribution networks having minimal skew. In the table, incrementally varying network features or criteria are provided (in the form of a table or list for example). Examples of such features include the length of a line connecting an L4 buffer to one or more L5 buffers and the number of L5 buffers driven by a single L4 buffer. For each incremental value of the network feature or features, one or more buffer types is specified. These buffer types have been previously modeled in the environment of the incremental value of the network features and found to meet certain criteria necessary to minimize skew.