Abstract: The present invention discloses a flip-chip semiconductor package and a chip carrier thereof. The chip carrier includes a groove formed around a chip-mounting area. The groove may be formed along a periphery of the chip-mounting area or at corners thereof. The groove is filled with a filler of low Young's modulus so as to absorb and eliminate thermal stress, thereby preventing delamination between an underfill and a flip chip mounted on the chip-mounting area.

Abstract: The present invention discloses a flip-chip semiconductor package and a chip carrier thereof. The chip carrier includes a groove formed around a chip-mounting area. The groove may be formed along a periphery of the chip-mounting area or at corners thereof. The groove is filled with a filler of low Young's modulus so as to absorb and eliminate thermal stress, thereby preventing delamination between an underfill and a flip chip mounted on the chip-mounting area.

Abstract: A semiconductor device, a chip structure thereof, and a method for fabricating the same are proposed. The method involves cutting a wafer with an array of chips twice so as to separate the chips and to form a chip structure. The first cutting is wider than the second cutting, and both are performed on an inactive surface of each of the chips. The chip structure includes a protruding portion formed on the inactive surface. The chip structure is electrically connected to a substrate by conductive bumps in a flip-chip manner and mounted with a heat sink. A decrease in contact area between the chip and the heat sink reduces warpage caused to the semiconductor device by thermal stress, thus preventing delamination of the heat sink and cracking of the conductive bumps, and reducing the expense and time spent on finding suitable underfill materials.

Abstract: A lead frame and a semiconductor package with the lead frame are provided. The lead frame includes a die pad for mounting at least one semiconductor chip thereon; at least one grounding portion protruded from the die pad; and a plurality of leads. The grounding portion has a grounding surface and an opposing bottom surface, wherein the thickness of the grounding portion is smaller than that of the die pad, and a ground pad is formed on the grounding surface for connecting at least one grounding wire to the chip for transmitting ground signals. A plurality of bonding wires are connected from the chip to the leads such that the chip can be electrically connected to an external device via the bonding wires and leads. By the above arrangement, the grounding wire can be prevented from breakage by thermal stress in a high-temperature process, and the production yield is improved.

Abstract: A lead frame and a semiconductor package with the lead frame are provided. The lead frame includes a die pad for mounting at least one semiconductor chip thereon; at least one grounding portion protruded from the die pad; and a plurality of leads. The grounding portion has a grounding surface and an opposing bottom surface, wherein the thickness of the grounding portion is smaller than that of the die pad, and a ground pad is formed on the grounding surface for connecting at least one grounding wire to the chip for transmitting ground signals. A plurality of bonding wires are connected from the chip to the leads such that the chip can be electrically connected to an external device via the bonding wires and leads. By the above arrangement, the grounding wire can be prevented from breakage by thermal stress in a high-temperature process, and the production yield is improved.