Abstract: A method for programming memory cells includes applying a programming voltage to a selected memory cell in a memory cell array and a neighboring passing voltage to a neighboring memory cell next to the selected memory cell, increasing the programming voltage for programming the selected memory cell, and increasing the neighboring passing voltage for programming the selected memory cell.

Abstract: A method for programming a multi-level cell and a memory apparatus are described, wherein each cell has two storage sites. The method includes making the first storage site have a first Vt level and the second storage site have a second Vt level. The first Vt level is selected from M Vt levels. When the first Vt level is the i-th level among the M Vt levels, the second Vt level is selected from ni Vt levels, wherein at least one ni is not equal to ni-1 (2?i?M). The multi-level cell has P storage states, wherein P = ? i = 1 M ? ? n i . The memory apparatus includes multiple multi-level cells and an operation circuit capable of performing the above method.

Abstract: A method for reducing leakage current of a semiconductor device includes supplying a substantially constant and non-zero bulk bias to a relatively low threshold voltage semiconductor device during formation of a conductive channel of the semiconductor device and during the formation of a non-conductive channel of the semiconductor device.

Abstract: A method for programming a multi-level cell and a memory apparatus are described, wherein each cell has two storage sites. The method includes making the first storage site have a first Vt level and the second storage site have a second Vt level. The first Vt level is selected from M Vt levels. When the first Vt level is the i-th level among the M Vt levels, the second Vt level is selected from ni Vt levels, wherein at least one ni is not equal to ni-1 (2?i?M). The multi-level cell has P storage states, wherein P = ? i = 1 M ? ? n i . The memory apparatus includes multiple multi-level cells and an operation circuit capable of performing the above method.