Abstract: The present disclosure provides a method for optimizing parameters of a ladder-type carbon trading mechanism based on an improved particle swarm optimization (IPSO) algorithm. The method first obtains information and operating data of a park-level integrated energy system, establishes equipment models and constraints of the park-level integrated energy system, and establishes a ladder-type carbon trading model; then encapsulates a process of optimized low-carbon dispatching of the park-level integrated energy system as a fitness function whose input is parameters of a carbon trading mechanism and output is a carbon emission of the system; and finally, introduces an IPSO algorithm to optimize the fitness function, and outputs optimization result information of the algorithm. The present disclosure verifies effectiveness and rationality of the model and the method that give full play to a role of the ladder-type carbon trading mechanism in the park-level integrated energy system through example analysis.

Abstract: The present disclosure provides a 3D memory structure such as 3D Flash memory structure applying for 3D AND flash memory and a method of forming the same. An etching stop layer is formed on a substrate including active elements. A stacked layer is formed on the etching stop layer. The stacked layer includes insulation layers and sacrificed layers stacked alternatively on the etching stop layer. A patterning process is performed on the stacked layer to form a first stacked structure above the active elements, a second stacked structure surrounding the first stacked structure, and a trench pattern separating the first stacked structure and the second stacked structure and exposing the etching stop layer. The trench pattern includes asymmetric inner sidewalls and outer sidewalls. The inner sidewalls define sidewalls of the first stacked structure. The outer sidewalls define sidewalls of the second stacked structure that face the first stacked structure.

Abstract: An electrical connector assembly includes an electrical connector having a card slot and plural terminals extending into the card slot; and a heat dissipation module having a fixing plate at one end thereof, the fixing plate having a notch; wherein the electrical connector has a supporting surface for supporting the fixing plate and a fixing member for mating with the notch, the fixing member includes a spherical or hemispherical head portion for guiding the fixing plate at multiple angles.

Abstract: A pixel circuit comprises a drive sub-circuit (101), writing sub-circuit (102), reset sub-circuit (103), voltage stabilizing sub-circuit (104), storage sub-circuit (105) and light emitting element. The drive sub-circuit is configured to provide a driving current to the light emitting element under control of signals of a first node (N1) and a second node (N2); the writing sub-circuit is configured to write a signal from a data signal terminal (Data) to N2 under control of signal of a scan signal terminal (Gate); the storage sub-circuit is configured to store a voltage of N1; the voltage stabilizing sub-circuit is configured to stabilize a voltage of an anode terminal of light emitting element through signal of a voltage stabilizing signal terminal (V1); the reset sub-circuit is configured to reset anode terminal of light emitting element under control of signal of Gate and reset N1 under control of signal of a reset control signal terminal (Reset).

Abstract: A semiconductor device includes a staircase structure and an extension part. The stacked structure is located on a dielectric substrate. The staircase structure includes a plurality of conductive layers and a plurality of insulating layers stacked alternately on each other. The extension part is located at an end of the lower stair part of the staircase structure. The resistance value of the extension part is different from the resistance value of the plurality of conductive layers.

Abstract: A pixel circuit comprises a drive sub-circuit (101), writing sub-circuit (102), reset sub-circuit (103), voltage stabilizing sub-circuit (104), storage sub-circuit (105) and light emitting element. The drive sub-circuit is configured to provide a driving current to the light emitting element under control of signals of a first node (N1) and a second node (N2); the writing sub-circuit is configured to write a signal from a data signal terminal (Data) to N2 under control of signal of a scan signal terminal (Gate); the storage sub-circuit is configured to store a voltage of N1; the voltage stabilizing sub-circuit is configured to stabilize a voltage of an anode terminal of light emitting element through signal of a voltage stabilizing signal terminal (V1); the reset sub-circuit is configured to reset anode terminal of light emitting element under control of signal of Gate and reset N1 under control of signal of a reset control signal terminal (Reset).

Abstract: A search engine server includes a communication interface through which to receive a multi-modal query from a browser of a client device, the multi-modal query including at least a first image of an item. A processing device, coupled to the communication interface, is to: execute a neural network (NN) regressor model on the first image to identify a plurality of second items that are similar to and compatible with the item depicted in the first image, wherein a set of images correspond to the plurality of second items; generate structured text that explains, within one of a phrase or a sentence, why the set of images are relevant to the item; and return, to the browser of the client device via the communication interface, a set of search results comprising the set of images and the structured text.

Abstract: The present application provides a three-mode storage method for program blocks based on check, comprising: first dividing the program to be injected into N blocks and checking each block to obtain the first checksum; then injecting the program to be injected and the first checksum twice in the program storage area, and the two injected programs are noted as the main program and the backup program, respectively; dividing the main program into N blocks, and checking each program block to obtain the second checksum during program run; dividing the backup program into N blocks and checking each block to obtain the third checksum; and comparing the checksum, second checksum and third checksum: if the three are consistent, performing no operation; updating the program or checksum and checking again, if the three are inconsistent.

Abstract: A navigation satellite time system and its autonomous recovery method are provided, including a load time system, the load time system is configured to generate and maintain the load time, and the load time system comprises an space borne atomic clock, a time-frequency processing unit and a plurality of load time backups module, the time information of the load time is obtained from the ground station time; the pulse-per-second signals of the load time are generated and maintained by the space borne atomic clock and the time-frequency processing unit; when the time-frequency processing unit fails, the first-level recovery state is triggered: the time-frequency processing unit compares the time information and the pulse-per-second signals reversely output by the multiple load time backup modules to perform load time recovery.

Abstract: Provided is a method of inducing or accelerating a healing process of wound in a subject in need thereof.

Abstract: A ranging method and apparatus are provided. The method includes: obtaining first measurement information and second measurement information (S410), where the first measurement information includes a plurality of groups of sampled data that are obtained by a first device by sampling retroreflection measurement signals received through a plurality of antenna channels of a single antenna, and the second measurement information includes a plurality of groups of sampled data that are obtained by a second device by sampling measurement signals received through a plurality of antenna channels of each of a plurality of antennas; and determining a distance between the first device and the second device based on the first measurement information and the second measurement information (S420). In this method, ranging is performed based on multi-antenna switching frequency hopping, so that a ranging delay meets a requirement, and ranging precision and robustness are improved.

Abstract: Provided are a semiconductor structure for a 3D memory and a manufacturing method thereof. The semiconductor structure may be used in a 3D AND flash memory. The semiconductor structure includes a substrate having a memory array region and a staircase region, an insulating layer, a stacked structure and a vertical channel (VC) structure. The insulating layer is disposed on the substrate. The stacked structure is disposed on the insulating layer. The stacked structure includes first dielectric layers separated from each other, and the stacked structure in the staircase region has a staircase profile. The VC structure is disposed in the stacked structure in the memory array region and penetrates through the stacked structure. There is a vertical hole in the stacked structure and the insulating layer in the staircase region, and a third dielectric layer is filled in the vertical hole.

Abstract: A method for positioning a communication device includes: receiving measurement information between a node to be positioned and a set of reference nodes of at least one type, the measurement information including an initial pseudorange and initial orientation angle measurement information between the node to be positioned and a reference node, and the set of reference nodes including at least one reference node; and substituting the measurement information into a preset parametric formula to obtain positioning information of the node to be positioned, the parametric formula being used for indicating a possibility that the positioning information is a value of a preset variable, and the positioning information including position information, clock deviation information and orientation angle information of the node to be positioned.

Abstract: The present invention relates to use of the compound having Formula (I) or a stereoisomer, a tautomer, an N-oxide, a solvate, a metabolite, a pharmaceutically acceptable salt or a prodrug thereof in the manufacture of a medicament or pharmaceutical composition for preventing, treating or lessening POD,

Abstract: A three-dimension memory device, a memory circuit and a production method are provided. The three-dimension memory circuit includes a peripheral circuit, a metal layer, a buffer layer, a poly silicon layer, and a via array. The peripheral circuit is disposed on a substrate. The metal layer covers on the peripheral circuit and is electrically coupled to the peripheral circuit. The buffer layer is disposed on the metal layer. The poly silicon layer receives a reference ground voltage and is disposed on the buffer layer. The via array is disposed in the buffer layer and is used to electrically connect the metal layer and the poly silicon layer.

Abstract: The present disclosure provides a 3D memory structure such as 3D Flash memory structure applying for 3D AND flash memory and a method of forming the same. An etching stop layer is formed on a substrate including active elements. A stacked layer is formed on the etching stop layer. The stacked layer includes insulation layers and sacrificed layers stacked alternatively on the etching stop layer. A patterning process is performed on the stacked layer to form a first stacked structure above the active elements, a second stacked structure surrounding the first stacked structure, and a trench pattern separating the first stacked structure and the second stacked structure and exposing the etching stop layer. The trench pattern includes asymmetric inner sidewalls and outer sidewalls. The inner sidewalls define sidewalls of the first stacked structure. The outer sidewalls define sidewalls of the second stacked structure that face the first stacked structure.

Abstract: The present application discloses a three-steering gear direct-drive coaxial rotor system and a control strategy, and belongs to the technical field of helicopter structures. The system includes an upper rotor power module, an upper rotor assembly, an upper tilting mechanism, a driving steering gear group assembly, a lower tilting mechanism, a lower rotor assembly, a lower rotor power module, an upper fixing mast, and a lower fixing mast. According to the present application, three steering gears directly drives an upper-layer swashplate and a lower-layer swashplate, to make cyclic pitch and add-subtract collective pitch on rotors. The synchronous tilting mechanism of the present application provides a flexible design solution for the characteristic of cyclic pitch phase angle offset of the rotors gear.

Abstract: A vertical memory structure comprises a stack of alternating layers of insulator material and word line material with a vertical opening through the alternating layers. One of the layers of insulating material and layers of word line material have recessed inside surfaces facing the opening. First and second conductive pillars are disposed inside the vertical opening. A data storage structure is disposed on the inside surfaces of the layers of word line material, including on the recessed inside surfaces. A semiconductor channel layer is disposed on the data storage structures around a perimeter of the vertical opening, and having first and second source/drain terminals at contacts with the first and second conductive pillars.

Abstract: A three-way catalytic conversion system for purification treatment of an engine exhaust gas and use thereof, including an oxidation segment containing an oxidation catalyst and a three-way conversion segment containing a three-way catalyst, where the oxidation catalyst is used to catalyze an oxidation reaction of reductive components in the engine exhaust gas with oxygen, the oxidation segment is located downstream of an engine, and the three-way conversion segment is located downstream of the oxidation segment. Further, the oxidation catalyst tolerant to ultra-high temperature is provided upstream of the three-way catalyst so that the engine exhaust gas is treated by the oxidation catalyst first and then by the three-way catalyst, which can avoid the TWC being exposed to high temperature caused by burning (CO, HC), reduce its deterioration, and ensure exertion of function of three-way catalytic conversion of the system, improving the purification efficiency of the engine exhaust gas.

Abstract: An ammonia adsorption catalyst and a preparation method and a use thereof, where the ammonia adsorption catalyst includes a substrate and an adsorption layer located on the surface of the substrate, and the adsorption layer includes a noble metal-containing zeolite adsorption material. The catalyst has the advantages of high ammonia adsorption/conversion efficiency, low cost, and flexible application, etc.