Patents by Inventor Yuan Sheng Chiu
Yuan Sheng Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240387368Abstract: A semiconductor device and method of manufacture are presented in which a first pad and a second pad are formed adjacent to each other. A first set of dummy pads is manufactured between the first pad and the second pad and bonding pads are formed in electrical connection to the first pad and the second pad.Type: ApplicationFiled: July 30, 2024Publication date: November 21, 2024Inventors: Chin-Yi Lin, Jie Chen, Sheng-Han Tsai, Yuan Sheng Chiu, Chou-Jui Hsu, Yu Kuei Yeh, Tsung-Shu Lin
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Publication number: 20240363486Abstract: In an embodiment, a device includes: an integrated circuit die; a redistribution structure over a front-side surface of the integrated circuit die; a socket over the redistribution structure; a mechanical brace over the socket, the mechanical brace having an opening exposing the socket, edge regions of the socket overlapping edge regions of the mechanical brace at the opening; a first standoff screw disposed in the edge regions of the mechanical brace, the first standoff screw physically contacting the socket, the first standoff screw extending a first distance between the socket and the mechanical brace; and a bolt extending through the mechanical brace and the redistribution structure.Type: ApplicationFiled: July 12, 2024Publication date: October 31, 2024Inventors: Yuan Sheng Chiu, Chih-Kai Cheng, Tsung-Shu Lin
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Patent number: 12080623Abstract: In an embodiment, a device includes: an integrated circuit die; a redistribution structure over a front-side surface of the integrated circuit die; a socket over the redistribution structure; a mechanical brace over the socket, the mechanical brace having an opening exposing the socket, edge regions of the socket overlapping edge regions of the mechanical brace at the opening; a first standoff screw disposed in the edge regions of the mechanical brace, the first standoff screw physically contacting the socket, the first standoff screw extending a first distance between the socket and the mechanical brace; and a bolt extending through the mechanical brace and the redistribution structure.Type: GrantFiled: May 17, 2021Date of Patent: September 3, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTDInventors: Yuan Sheng Chiu, Chih-Kai Cheng, Tsung-Shu Lin
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Publication number: 20240282659Abstract: A semiconductor package includes a first heat dissipation plate, a second heat dissipation plate, a plurality of heat generating assemblies, and a plurality of fixture components. The first heat dissipation plate has a first upper surface and a first lower surface. The first heat dissipation plate includes first through holes extended from the first upper surface to the first lower surface. The second heat dissipation plate has a second upper surface and a second lower surface. The second heat dissipation plate includes second through holes extended from the second upper surface to the second lower surface. The heat generating assemblies are disposed between the first heat dissipation plate and the second heat dissipation plate. The fixture components include fix screws and nuts. The fix screws penetrate through the first heat dissipation plate and the second heat dissipation plate along the first through holes and the second through holes.Type: ApplicationFiled: April 28, 2024Publication date: August 22, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hsiang Lao, Yuan-Sheng Chiu, Hung-Chi Li, Shih-Chang Ku, Tsung-Shu Lin
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Publication number: 20240234340Abstract: An integrated circuit package with a perforated stiffener ring and the method of forming the same are provided. The integrated circuit package may comprise an integrated circuit package component having an integrated circuit die on a substrate, an underfill between the integrated circuit package component and the substrate, and a stiffener ring attached to the substrate. The stiffener ring may encircle the integrated circuit package component and the underfill in a top-down view. The stiffener ring may comprise a perforated region, wherein the perforated region may comprise an array of openings extending from a top surface of the stiffener ring to a bottom surface of the stiffener ring.Type: ApplicationFiled: January 9, 2023Publication date: July 11, 2024Inventors: Yi-Che Chiang, Yuan Sheng Chiu, Hong-Yu Guo, Hsin-Yu Pan, Tsung-Shu Lin
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Patent number: 11996342Abstract: A semiconductor package includes a first heat dissipation plate, a second heat dissipation plate, a plurality of heat generating assemblies, and a plurality of fixture components. The first heat dissipation plate has a first upper surface and a first lower surface. The first heat dissipation plate includes first through holes extended from the first upper surface to the first lower surface. The second heat dissipation plate has a second upper surface and a second lower surface. The second heat dissipation plate includes second through holes extended from the second upper surface to the second lower surface. The heat generating assemblies are disposed between the first heat dissipation plate and the second heat dissipation plate. The fixture components include fix screws and nuts. The fix screws penetrate through the first heat dissipation plate and the second heat dissipation plate along the first through holes and the second through holes.Type: GrantFiled: August 30, 2021Date of Patent: May 28, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hsiang Lao, Yuan-Sheng Chiu, Hung-Chi Li, Shih-Chang Ku, Tsung-Shu Lin
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Publication number: 20230386908Abstract: A method includes forming a plurality of dielectric layers over a semiconductor substrate, forming a plurality of metal lines and vias in the plurality of dielectric layers, forming a lower portion of an inner seal ring and a lower portion of an outer seal ring extending into the plurality of dielectric layers, depositing a first dielectric layer over the plurality of metal lines and vias, and etching the first dielectric layer to form an opening penetrating through the first dielectric layer. After the first dielectric layer is etched, a top surface of the lower portion of the inner seal ring is exposed, and an entire topmost surface of the lower portion of the outer seal ring is in contact with a bottom surface of the first dielectric layer. An upper portion of the inner seal ring is then formed to extend into the opening and to join the lower portion of the inner seal ring. A second dielectric layer is deposited to cover the upper portion of the inner seal ring.Type: ApplicationFiled: August 12, 2022Publication date: November 30, 2023Inventors: Sheng-Han Tsai, Yuan Sheng Chiu, Chou-Jui Hsu, Tsung-Shu Lin
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Publication number: 20230361027Abstract: A semiconductor device and method of manufacture are presented in which a first pad and a second pad are formed adjacent to each other. A first set of dummy pads is manufactured between the first pad and the second pad and bonding pads are formed in electrical connection to the first pad and the second pad.Type: ApplicationFiled: August 12, 2022Publication date: November 9, 2023Inventors: Chin-Yi Lin, Jie Chen, Sheng-Han Tsai, Yuan Sheng Chiu, Chou-Jui Hsu, Yu Kuei Yeh, Tsung-Shu Lin
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Publication number: 20230064253Abstract: A semiconductor package includes a first heat dissipation plate, a second heat dissipation plate, a plurality of heat generating assemblies, and a plurality of fixture components. The first heat dissipation plate has a first upper surface and a first lower surface. The first heat dissipation plate includes first through holes extended from the first upper surface to the first lower surface. The second heat dissipation plate has a second upper surface and a second lower surface. The second heat dissipation plate includes second through holes extended from the second upper surface to the second lower surface. The heat generating assemblies are disposed between the first heat dissipation plate and the second heat dissipation plate. The fixture components include fix screws and nuts. The fix screws penetrate through the first heat dissipation plate and the second heat dissipation plate along the first through holes and the second through holes.Type: ApplicationFiled: August 30, 2021Publication date: March 2, 2023Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hsiang Lao, Yuan-Sheng Chiu, Hung-Chi Li, Shih-Chang Ku, Tsung-Shu Lin
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Publication number: 20210272875Abstract: In an embodiment, a device includes: an integrated circuit die; a redistribution structure over a front-side surface of the integrated circuit die; a socket over the redistribution structure; a mechanical brace over the socket, the mechanical brace having an opening exposing the socket, edge regions of the socket overlapping edge regions of the mechanical brace at the opening; a first standoff screw disposed in the edge regions of the mechanical brace, the first standoff screw physically contacting the socket, the first standoff screw extending a first distance between the socket and the mechanical brace; and a bolt extending through the mechanical brace and the redistribution structure.Type: ApplicationFiled: May 17, 2021Publication date: September 2, 2021Inventors: Yuan Sheng Chiu, Chih-Kai Cheng, Tsung-Shu Lin
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Patent number: 11011451Abstract: In an embodiment, a device includes: an integrated circuit die; a redistribution structure over a front-side surface of the integrated circuit die; a socket over the redistribution structure; a mechanical brace over the socket, the mechanical brace having an opening exposing the socket, edge regions of the socket overlapping edge regions of the mechanical brace at the opening; a first standoff screw disposed in the edge regions of the mechanical brace, the first standoff screw physically contacting the socket, the first standoff screw extending a first distance between the socket and the mechanical brace; and a bolt extending through the mechanical brace and the redistribution structure.Type: GrantFiled: April 4, 2019Date of Patent: May 18, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yuan Sheng Chiu, Chih-Kai Cheng, Tsung-Shu Lin
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Publication number: 20200185304Abstract: In an embodiment, a device includes: an integrated circuit die; a redistribution structure over a front-side surface of the integrated circuit die; a socket over the redistribution structure; a mechanical brace over the socket, the mechanical brace having an opening exposing the socket, edge regions of the socket overlapping edge regions of the mechanical brace at the opening; a first standoff screw disposed in the edge regions of the mechanical brace, the first standoff screw physically contacting the socket, the first standoff screw extending a first distance between the socket and the mechanical brace; and a bolt extending through the mechanical brace and the redistribution structure.Type: ApplicationFiled: April 4, 2019Publication date: June 11, 2020Inventors: Yuan Sheng Chiu, Chih-Kai Cheng, Tsung-Shu Lin