Patents by Inventor Yuan-Ting Lin

Yuan-Ting Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250040294
    Abstract: A semiconductor device is provided, which includes an active structure, a first semiconductor layer, a second semiconductor layer, an insulating layer, and a conductive layer. The active region has two sides and includes an active region. The first semiconductor layer and the second semiconductor layer respectively located on the two sides of the active structure. The insulating layer covers a portion of the first semiconductor layer. The conductive layer covers the insulating layer and physically contacts the first semiconductor layer. The second semiconductor layer includes a first dopant and the first semiconductor layer includes a second dopant different from the first dopant. The first semiconductor layer includes a quaternary III-V semiconductor material, and the active region includes a quaternary semiconductor material, and the semiconductor device emits a radiation having a peak wavelength between 800 nm and 2000 nm.
    Type: Application
    Filed: September 25, 2024
    Publication date: January 30, 2025
    Inventors: Meng-Yang CHEN, Yuan-Ting LIN
  • Patent number: 12136683
    Abstract: A semiconductor device is provided, which includes an active structure, a first semiconductor layer, a second semiconductor layer, an intermediate layer, a transition layer and a contact layer. The active structure has two sides and includes an active region. The first semiconductor layer and the second semiconductor layer respectively located on the two sides of the active structure. The intermediate layer is located between the second semiconductor layer and the active structure. The transition layer is located on the second semiconductor layer. The contact layer is located on the transition layer.
    Type: Grant
    Filed: June 23, 2023
    Date of Patent: November 5, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Meng-Yang Chen, Yuan-Ting Lin
  • Publication number: 20230335669
    Abstract: A semiconductor device is provided, which includes an active structure, a first semiconductor layer, a second semiconductor layer, an intermediate layer, a transition layer and a contact layer. The active structure has two sides and includes an active region. The first semiconductor layer and the second semiconductor layer respectively located on the two sides of the active structure. The intermediate layer is located between the second semiconductor layer and the active structure. The transition layer is located on the second semiconductor layer. The contact layer is located on the transition layer.
    Type: Application
    Filed: June 23, 2023
    Publication date: October 19, 2023
    Inventors: Meng-Yang CHEN, Yuan-Ting LIN
  • Patent number: 11728456
    Abstract: A semiconductor device is provided, which includes an active structure and a first semiconductor layer. The active structure includes an active region having a topmost surface and a bottommost surface, and a first dopant distributing from the topmost surface to the bottommost surface. The first semiconductor layer is located under the active structure and includes a second dopant. The active region includes a semiconductor material including As.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: August 15, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Meng-Yang Chen, Yuan-Ting Lin
  • Publication number: 20220285576
    Abstract: A semiconductor device is provided, which includes an active structure and a first semiconductor layer. The active structure includes an active region having a topmost surface and a bottommost surface, and a first dopant distributing from the topmost surface to the bottommost surface. The first semiconductor layer is located under the active structure and includes a second dopant. The active region includes a semiconductor material including As.
    Type: Application
    Filed: May 20, 2022
    Publication date: September 8, 2022
    Inventors: Meng-Yang CHEN, Yuan-Ting LIN
  • Patent number: 11404333
    Abstract: A semiconductor device includes a first semiconductor die, a second semiconductor die, a dielectric layer, a first redistribution layer and a second redistribution layer. The first semiconductor die includes a first bonding pad and a second bonding pad. The second semiconductor die includes a third bonding pad and a fourth bonding pad. The dielectric layer covers the first semiconductor die and the second semiconductor die, and defines a first opening exposing the first bonding pad and the second bonding pad and a second opening exposing the third bonding pad and the fourth bonding pad. The first redistribution layer is disposed on the dielectric layer, and electrically connects the first bonding pad and the third bonding pad. The second redistribution layer is disposed on the dielectric layer, and electrically connects the second bonding pad and the fourth bonding pad.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: August 2, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yuan-Ting Lin, Che Wei Chang, Chi-Yu Wang
  • Patent number: 11374146
    Abstract: A semiconductor device is provided, which includes an active structure and a first semiconductor layer. The active structure includes an active region having a topmost surface and a bottommost surface, and a first dopant distributing from the topmost surface to the bottommost surface. The first semiconductor layer is located under the active structure and includes a second dopant. The active region includes a semiconductor material including As.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: June 28, 2022
    Assignee: EPISTAR CORPORATION
    Inventors: Meng-Yang Chen, Yuan-Ting Lin
  • Publication number: 20200365757
    Abstract: A semiconductor device is provided, which includes an active structure and a first semiconductor layer. The active structure includes an active region having a topmost surface and a bottommost surface, and a first dopant distributing from the topmost surface to the bottommost surface. The first semiconductor layer is located under the active structure and includes a second dopant. The active region includes a semiconductor material including As.
    Type: Application
    Filed: May 15, 2020
    Publication date: November 19, 2020
    Inventors: Meng-Yang CHEN, Yuan-Ting LIN
  • Publication number: 20200243406
    Abstract: A semiconductor device includes a first semiconductor die, a second semiconductor die, a dielectric layer, a first redistribution layer and a second redistribution layer. The first semiconductor die includes a first bonding pad and a second bonding pad. The second semiconductor die includes a third bonding pad and a fourth bonding pad. The dielectric layer covers the first semiconductor die and the second semiconductor die, and defines a first opening exposing the first bonding pad and the second bonding pad and a second opening exposing the third bonding pad and the fourth bonding pad. The first redistribution layer is disposed on the dielectric layer, and electrically connects the first bonding pad and the third bonding pad. The second redistribution layer is disposed on the dielectric layer, and electrically connects the second bonding pad and the fourth bonding pad.
    Type: Application
    Filed: January 30, 2019
    Publication date: July 30, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yuan-Ting LIN, Che Wei CHANG, Chi-Yu WANG
  • Patent number: 9773753
    Abstract: A semiconductor device includes a first die, a second die, an encapsulant, a first dielectric layer, and at least one first trace. The first die includes a first surface and a second surface opposite to the first surface and includes at least one first pad disposed adjacent to the first surface of the first die. The second die includes a first surface and a second surface opposite to the first surface and includes at least one second pad disposed adjacent to the first surface of the second die. The first dielectric layer is disposed on at least a portion of the first surface of the first die and at least a portion of the first surface of the second die. The first trace is disposed on the first dielectric layer, which connects the first pad to the second pad, and the first trace comprises an end portion disposed adjacent to the first pad and a body portion, and the end portion extends at an angle ?1 relative to a direction of extension of the body portion.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: September 26, 2017
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yuan-Ting Lin, Chi-Yu Wang, Wei-Hong Lai, Chin-Li Kao
  • Publication number: 20080178931
    Abstract: A photovoltaic device having multi-junction nanostructures deposited as a multi-layered thin film on a substrate. Preferably, the device is grown as InxGa1-xN multi-layered junctions with the gradient x, where x is any value in the range from zero to one. The nanostructures are preferably 5-500 nanometers and more preferably 10-20 nanometers in diameter. The values of x are selected so that the bandgap of each layer is varied from 0.7 eV to 3.4 eV to match as nearly as possible the solar energy spectrum of 0.4 eV-4 eV.
    Type: Application
    Filed: January 24, 2008
    Publication date: July 31, 2008
    Inventors: Hye-Won Seo, Li-Wei Tu, Cheng-Ying Ho, Chang-Kong Wang, Yuan-Ting Lin