Patents by Inventor Yuan-Tzu Ting

Yuan-Tzu Ting has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7051263
    Abstract: A Comma-Free Reed-Solomon decoding circuit based on systolic array architecture that applies to a cell search in a wideband code division multiple access system, and more particularly a decoding circuit that employs a systolic array in its circuit structure. The systolic array for the decoding circuit comprises an input pattern generator, a processing element array designed in the form of a systolic array and a boundary processing element array. Given the skewed-form output results required by the systolic array and generated by the input pattern generator, the processing element array makes a correlating comparison, and outputs the results of the correlating comparison to the boundary processing element, so as to acquire the decoding results required by the Comma-Free Reed-Solomon code. The results indicate the frame boundary and scrambling code groups of the cell search in a wideband code division multiple access system.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: May 23, 2006
    Assignee: Chung Shan Institute of Science and Technology
    Inventors: Chi-Fang Li, Wern-Ho Sheen, Yuan-Sun Chu, Jan-Shin Ho, Yuan-Tzu Ting
  • Patent number: 6944813
    Abstract: A weighted decoding method and circuits for Comma-Free Reed-Solomon codes that apply to a cell search in a wideband code division multiple access system. The invention also provides a weighted decoding method wherein the decoding result of the secondary synchronization code is used as a weight for received Comma-Free Reed-Solomon symbol data, and the weighted symbol data is input to the processing element array of the decoding circuit, so as to perform a weighted correlating comparison and thus enhance the accuracy of the decoding result. The weighted decoding method put forward by the invention may apply to a decoding architecture that is based on a systolic array and the decoding architecture that is based on a folding systolic array.
    Type: Grant
    Filed: April 12, 2002
    Date of Patent: September 13, 2005
    Assignee: Chung Shan Institute of Science and Technology
    Inventors: Chi-Fang Li, Wern-Ho Sheen, Yuan-Sun Chu, Jan-Shin Ho, Yuan-Tzu Ting
  • Patent number: 6928600
    Abstract: A kind of folding systolic array architecture for a CFRS decoding circuit that applies to a cell search in a wideband code division multiple access system. The invention involves using a systolic array for its decoding circuit and using a kind of folding technology to reduce the area of the systolic array. The systolic array for the decoding circuit comprises an input pattern generator, a processing element array designed in the form of a systolic array and a boundary processing element array. Given the skewed-form output results required by the systolic array and generated by the input pattern generator, the processing element array makes a set of correlating comparisons, and outputs the results of the correlating comparisons to the boundary processing elements, so as to acquire the decoding results required by the CFRS decoding. The results indicate the frame boundary and scrambling code groups of the cell search in a wideband code division multiple access system.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: August 9, 2005
    Assignee: Chung Shan Institute of Science and Technology
    Inventors: Chi-Fang Li, Wern-Ho Sheen, Yuan-Sun Chu, Jan-Shin Ho, Yuan-Tzu Ting
  • Publication number: 20030196160
    Abstract: A Comma-Free Reed-Solomon decoding circuit based on systolic array architecture that applies to a cell search in a wideband code division multiple access system, and more particularly a decoding circuit that employs a systolic array in its circuit structure. The systolic array for the decoding circuit comprises an input pattern generator, a processing element array designed in the form of a systolic array and a boundary processing element array. Given the skewed-form output results required by the systolic array and generated by the input pattern generator, the processing element array makes a correlating comparison, and outputs the results of the correlating comparison to the boundary processing element, so as to acquire the decoding results required by the Comma-Free Reed-Solomon code. The results indicate the frame boundary and scrambling code groups of the cell search in a wideband code division multiple access system.
    Type: Application
    Filed: April 12, 2002
    Publication date: October 16, 2003
    Inventors: Chi-Fang Li, Wern-Ho Sheen, Yuan-Sun Chu, Jan-Shin Ho, Yuan-Tzu Ting
  • Publication number: 20030196161
    Abstract: A weighted decoding method and circuits for Comma-Free Reed-Solomon codes that apply to a cell search in a wideband code division multiple access system. The invention also provides a weighted decoding method wherein the decoding result of the secondary synchronization code is used as a weight, and the weight is added to the processing element array of the decoding circuit, so as to perform a weighted correlating comparison and thus enhance the accuracy of the decoding result. The weighted decoding method put forward by the invention may apply to the decoding architecture that is based on a systolic array and the decoding architecture that is based on a folding systolic array.
    Type: Application
    Filed: April 12, 2002
    Publication date: October 16, 2003
    Inventors: Chi-Fang Li, Wern-Ho Sheen, Yuan-Sun Chu, Jan-Shin Ho, Yuan-Tzu Ting
  • Publication number: 20030196162
    Abstract: A kind of folding systolic array architecture for a CFRS decoding circuit that applies to a cell search in a wideband code division multiple access system. The invention involves using a systolic array for its decoding circuit and using a kind of folding technology to reduce the area of the systolic array. The systolic array for the decoding circuit comprises an input pattern generator, a processing element array designed in the form of a systolic array and a boundary processing element array. Given the skewed-form output results required by the systolic array and generated by the input pattern generator, the processing element array makes a set of correlating comparisons, and outputs the results of the correlating comparisons to the boundary processing elements, so as to acquire the decoding results required by the CFRS decoding. The results indicate the frame boundary and scrambling code groups of the cell search in a wideband code division multiple access system.
    Type: Application
    Filed: April 16, 2002
    Publication date: October 16, 2003
    Inventors: Chi-Fang Li, Wern-Ho Sheen, Yuan-Sun Chu, Jan-Shin Ho, Yuan-Tzu Ting