Abstract: A display panel includes gate lines and a gate driver. The gate driver includes series coupled driving stages, in which an N-th driving stage of the series-coupled driving stages includes a driving unit and an input control unit. The driving unit transmits a first clock signal according to a control voltage level of a control node, so as to output a gate-driving signal. The input control unit transmits the gate-driving signal outputted from an (N?1)-th driving stage to the control nodes, so as to adjust the control voltage level to one of a first voltage level and a second voltage level. A predetermined time interval is present between a rising edge of the first clock signal and a falling edge of the second clock signal. During the predetermined time interval, the control voltage level is pulled to the first voltage level by the input control unit.

Abstract: A display panel includes gate lines and a gate driver. The gate driver includes series coupled driving stages, in which an N-th driving stage of the series-coupled driving stages includes a driving unit and an input control unit. The driving unit transmits a first clock signal according to a control voltage level of a control node, so as to output a gate-driving signal. The input control unit transmits the gate-driving signal outputted from an (N?1)-th driving stage to the control nodes, so as to adjust the control voltage level to one of a first voltage level and a second voltage level. A predetermined time interval is present between a rising edge of the first clock signal and a falling edge of the second clock signal. During the predetermined time interval, the control voltage level is pulled to the first voltage level by the input control unit.