Abstract: A memory device, includes a memory array for storing a plurality of vector data each of which has an MSB vector and a LSB vector. The memory array includes a plurality of memory units each of which has a first bit and a second bit. The first bit is used to store the MSB vector of each vector data, the second bit is used to store the LSB vector of each vector data. A bit line corresponding to each vector data executes one time of bit-line-setup, and reads the MSB vector and the LSB vector of each vector data according to the bit line. The threshold voltage distribution of each memory unit is divided into N states, where N is a positive integer and N is less than 2 to the power of 2, and the effective bit number stored by each memory unit is less than 2.

Abstract: One aspect of this description relates to a testing apparatus including an advance process control monitor (APCM) in a first wafer, a plurality of pads disposed over and coupled to the APCM. The plurality of pads are in a second wafer. The testing apparatus includes a testing unit disposed between the first wafer and the second wafer. The testing unit is coupled to the APCM. The testing unit includes a metal structure within a dielectric. The testing apparatus includes a plurality of through silicon vias (TSVs) extending in a first direction from the first wafer, through the dielectric of the testing unit, to the second wafer.

Abstract: The present disclosure provides a semiconductor wafer. The semiconductor wafer includes: a scribe line between a first row of dies and a second row of dies; and a benchmark circuit disposed adjacent to the scribe line and electrically coupled to a first conductive contact and a second conductive contact. The benchmark circuit includes a first device-under-test (DUT); a second DUT; a first switching circuit configured to selectively couple the first DUT and the second DUT to the first conductive contact; and a second switching circuit configured to selectively couple the first DUT and the second DUT to the second conductive contact.

Abstract: A method for controlling voltage crossing a power switch of a switched-mode power converter includes the steps of: controlling a switch frequency of the power switch of the switched-mode power converter to a first frequency as activating the switched-mode power converter; and then changing the switch frequency of the power switch to a second frequency after the switched-mode power converter is activated for a predetermined time; wherein the first frequency is lower than the second frequency.

Abstract: A method for controlling voltage crossing a power switch of a switched-mode power converter is disclosed. The method comprises the steps of: controlling a switch frequency of a power switch of a switched-mode power converter to a first frequency as activating the switched-mode power converter; and changing the switch frequency of the power switch to a second frequency after a specific amount of time; wherein the first frequency is lower than the second frequency.

Abstract: A control circuit for use in a power converter has a multi-function terminal, a current comparator circuit, and an under-voltage detection circuit. The current comparator circuit compares current flowing through a power switch of the power converter with a reference value through the multi-function terminal when the power switch is on, and turns the power switch off when the current reaches the reference value. The under-voltage detection circuit determines whether an input voltage of the power converter is less than a predetermined value through the multi-function terminal when the power switch is turned off.

Abstract: A control method for adjusting leading edge blanking time in a power converting system is disclosed. The control method includes: receiving a feedback signal relative to a load connected to an output terminal of the power converting system; determining the leading edge blanking time to be a first value if the feedback signal has a magnitude about a first voltage; and determining the leading edge blanking time to be a second value if the feedback signal has a magnitude about a second voltage, wherein the first value is smaller than the second value, and the first voltage is greater than the second voltage.

Abstract: A control circuit for use in a power converter has a multi-function terminal, a current comparator circuit, and an under-voltage detection circuit. The current comparator circuit compares current flowing through a power switch of the power converter with a reference value through the multi-function terminal when the power switch is on, and turns the power switch off when the current reaches the reference value. The under-voltage detection circuit determines whether an input voltage of the power converter is less than a predetermined value through the multi-function terminal when the power switch is turned off.

Abstract: A control method for adjusting leading edge blanking time in a power converting system is disclosed. The control method includes: receiving a feedback signal relative to a load connected to an output terminal of the power converting system; determining the leading edge blanking time to be a first value if the feedback signal has a magnitude about a first voltage; and determining the leading edge blanking time to be a second value if the feedback signal has a magnitude about a second voltage, wherein the first value is smaller than the second value, and the first voltage is greater than the second voltage.

Abstract: A control circuit for adjusting leading edge blanking time is disclosed. The control circuit is applied to a power converting system. The control circuit adjusts a leading edge blanking time according to a feedback signal relative to a load connected to the output terminal of the power converting system. An over-current protection mechanism of the power converting system is disabled within the leading edge blanking time.

Abstract: A control circuit for adjusting leading edge blanking time is disclosed. The control circuit is applied to a power converting system. The control circuit adjusts a leading edge blanking time according to a feedback signal relative to a load connected to the output terminal of the power converting system. An over-current protection mechanism of the power converting system is disabled within the leading edge blanking time.

Abstract: A high voltage charging circuit is provided with the ability of rapid charging. The circuit is composed of a turn-on control circuit, a turn-off control circuit and a transistor. The turn-on control circuit is adopted to set a turn-on time of a transistor such that the transformer may store magnetic energy, while the turn-off control circuit is used to set a turn-off time of the transistor such that the transformer may release the magnetic energy to charge a high voltage capacitor. Smaller inductance reduces the turn-on time of the power transistor owing to the maximum current of the primary side of the transformer. Therefore, a small-sized transformer may be employed to reduce the volume of the charging circuit with nonoccurrence of saturation.

Abstract: A pulse-width-modulation control circuit of a switching-mode power converter with a primary-side feedback control is disclosed. The switching-mode power converter includes a transformer, a power switch, a current sensing resistor and the pulse-width-modulation control circuit. The transformer includes a primary-side winding, a secondary-side winding and an auxiliary winding. The pulse-width-modulation control circuit includes a sample and hold circuit, a transconductor circuit, an error amplifier and a pulse-width-modulation generator.

Abstract: A pulse-width-modulation control circuit of a switching-mode power converter with a primary-side feedback control is disclosed. The switching-mode power converter includes a transformer, a power switch, a current sensing resistor and the pulse-width-modulation control circuit. The transformer includes a primary-side winding, a secondary-side winding and an auxiliary winding. The pulse-width-modulation control circuit includes a sample and hold circuit, a transconductor circuit, an error amplifier and a pulse-width-modulation generator.

Abstract: A high voltage charging circuit includes an activation control circuit, an inactivation control circuit and a power transistor. The activation control circuit is used for controlling an ON time period of the power transistor to enable the transformer to store excited-magnetic energy; the inactivation control circuit is used for controlling an OFF time period of the power transistor to make the transformer to release the excited-magnetic energy and use the excited-magnetic energy to charge the high voltage capacitor. Since the user can select a smaller Lp to keep constant the maximum value IP,max for the primary side current IP, the period tON can be made smaller as well, which means that a transformer 14 with a smaller volume can be utilized to reduce the entire size of the high voltage charging circuit.

Abstract: A high voltage charging circuit includes an activation control circuit, an inactivation control circuit and a power transistor. The activation control circuit is used for controlling an ON time period of the power transistor to enable the transformer to store excited-magnetic energy; the inactivation control circuit is used for controlling an OFF time period of the power transistor to make the transformer to release the excited-magnetic energy and use the excited-magnetic energy to charge the high voltage capacitor. Since the user can select a smaller Lp to keep constant the maximum value IP,max for the primary side current IP, the period tON can be made smaller as well, which means that a transformer 14 with a smaller volume can be utilized to reduce the entire size of the high voltage charging circuit.

Abstract: A high voltage charging circuit is provided with the ability of rapid charging. The circuit is composed of a turn-on control circuit, a turn-off control circuit and a transistor. The turn-on control circuit is adopted to set a turn-on time of a transistor such that the transformer may store magnetic energy, while the turn-off control circuit is used to set a turn-off time of the transistor such that the transformer may release the magnetic energy to charge a high voltage capacitor. Smaller inductance reduces the turn-on time of the power transistor owing to the maximum current of the primary side of the transformer. Therefore, a small-sized transformer may be employed to reduce the volume of the charging circuit with nonoccurrence of saturation.

Abstract: A capacitance charge device with adjustable clamping voltage is disclosed in the invention, which includes a high-farad capacitance and a power supply device for charging to the high-farad capacitance. In addition, a switch device is connected between the power supply device and the capacitance, and through the on/off operations of the switch device, the on/off conductions between the power supply device and the capacitance can be controlled. Besides, a clamping circuit is connected between the switch device and the capacitance and also connected to the output terminal of the power supply device. In addition, the clamping circuit has a clamping voltage, which can be compared with the actual voltage so as to control the on/off operations of the switch device and in turn control the on/off conductions between the power supply device and the capacitance. In addition, the invention can constrain the battery voltage in the clamping voltage of the clamping circuit.

Abstract: A capacitance charge device with adjustable clamping voltage is disclosed in the invention, which includes a high-farad capacitance and a power supply device for charging to the high-farad capacitance. In addition, a switch device is connected between the power supply device and the capacitance, and through the on/off operations of the switch device, the on/off conductions between the power supply device and the capacitance can be controlled. Besides, a clamping circuit is connected between the switch device and the capacitance and also connected to the output terminal of the power supply device. In addition, the clamping circuit has a clamping voltage, which can be compared with the actual voltage so as to control the on/off operations of the switch device and in turn control the on/off conductions between the power supply device and the capacitance. In addition, the invention can constrain the battery voltage in the clamping voltage of the clamping circuit.