Abstract: Methods and apparatuses for remote electrical tilt (RET) control are disclosed. According to an embodiment, a network entity obtains beam reports indicating beam candidates suitable for serving terminal devices in a serving area of an access network node. The network entity determines a spatial distribution of the beam candidates based on the beam reports. The network entity determines one or more boundaries dividing the beam candidates into a plurality of groups, based on the spatial distribution. The network entity determines control information related to RET for an antenna array of the access network node, based on the one or more boundaries.

Abstract: Embodiments of the present disclosure provide methods and apparatuses for resource scheduling. A method at a base station comprises determining a passive interference cancellation capability of a User Equipment (UE) having a passive interference issue. The passive interference is coupled into a receive path of the UE from a transmission of at least one signal through a transmit path of the UE. The method further comprises scheduling at least one uplink resource for the UE based on the passive interference cancellation capability.

Abstract: A Doherty amplifier (300) is provided, it comprises: a main amplifier (301) and a peak amplifier (302); a first microstrip (303) with ?/4 electric length connected between the main amplifier and the peak amplifier; a second microstrip (304) with ?/4 electric length connected between a junction of outputs of the peak amplifier and the main amplifier, and an output terminal (306); at least a tuner (305) for adjusting radius of VSWR circle of the main amplifier and connected, in series with the first microstrip (303), between the main amplifier (301) and the peak amplifier (302) based on input signal power. The hack-off power level efficiency is increased by enlarge the VSWR radius with the new Doherty structure.

Abstract: A Doherty amplifier (300) is provided, it comprises: a main amplifier (301) and a peak amplifier (302); a first microstrip (303) with ?/4 electric length connected between the main amplifier and the peak amplifier; a second microstrip (304) with electric length connected between a junction of outputs of the peak amplifier and the main amplifier, and an output terminal (306); at least a tuner (305) for adjusting radius of VSWR circle of the main amplifier and connected, in series with the first microstrip (303), between the main amplifier (301) and the peak amplifier (302) based on input signal power. The hack-off power level efficiency is increased by enlarge the VSWR radius with the new Doherty structure.

Abstract: A thermal pad (602, 612, 622, 702, 712) formed on a Printed Circuit Board and a method (900) of formed the thermal pad (602, 612, 622, 702, 712) are provided. The thermal pad (602, 612, 622, 702, 712) comprises in its interior one or more coins (604, 614, 624, 704, 714) has a height equal to a thickness of the PCB, and is made of metal or alloy, inserted into a corresponding one of one or more plated cutouts straight through the PCB in the thermal pad, and bonded to side walls of the corresponding one of the one or more plated cutouts with a paste capable of resisting a temperature of 250° C. or above. The plurality of through via (606, 616, 626, 706, 716) are plated, and lugged with a solder mask. The thermal pad (602, 612, 622, 702, 712) has a flat top surface and a flat bottom surface, either of which is coplanar with a corresponding one of top and bottom surfaces of the PCB. A PCB having formed thereon the above thermal pad (602, 612, 622, 702, 712) is also provided.

Abstract: A thermal pad (602, 612, 622, 702, 712) formed on a Printed Circuit Board and a method (900) of formed the thermal pad (602, 612, 622, 702, 712) are provided. The thermal pad (602, 612, 622, 702, 712) comprises in its interior one or more coins (604, 614, 624, 704, 714) has a height equal to a thickness of the PCB, and is made of metal or alloy, inserted into a corresponding one of one or more plated cutouts straight through the PCB in the thermal pad, and bonded to side walls of the corresponding one of the one or more plated cutouts with a paste capable of resisting a temperature of 250° C. or above. The plurality of through via (606, 616, 626, 706, 716) are plated, and lugged with a solder mask. The thermal pad (602, 612, 622, 702, 712) has a flat top surface and a flat bottom surface, either of which is coplanar with a corresponding one of top and bottom surfaces of the PCB. A PCB having formed thereon the above thermal pad (602, 612, 622, 702, 712) is also provided.