Abstract: A method is disclosed that includes the operations below: determining, by a processing unit, that arrival times of a lot arrived at N process stages are less than processing times of the lot predetermined to be processed at the N process stages, N being a positive integer; comparing, by the processing unit, idle times of multiple tools in the N process stages; and processing the lot with a first tool of the tools at each one of the N process stages, wherein the first tool of the tools has a shortest idle time.

Abstract: A method is disclosed that includes the operations below: determining, by a processing unit, that arrival times of a lot arrived at N process stages are less than processing times of the lot predetermined to be processed at the N process stages, N being a positive integer; comparing, by the processing unit, idle times of multiple tools in the N process stages; and processing the lot with a first tool of the tools at each one of the N process stages, wherein the first tool of the tools has a shortest idle time.

Abstract: A method is disclosed that includes the operations below: comparing an arrival time of a lot arrived at a process stage of N process stages with a processing time, determining whether one of tools at the process stage has a remain operation time which is equal to, or less than and closest to the arrival time, when a first tool of the tools has a first remain operation time which is equal to, or less than and closest to the arrival time, processing the lot with the first tool of the tools in the process stage after dispatching the lot to the processing stage, and generating at least one semiconductor device from the lot based on the comparing, determining and processing.

Abstract: A method is disclosed that includes the operations below: comparing an arrival time of a lot arrived at a process stage of N process stages with a processing time, determining whether one of tools at the process stage has a remain operation time which is equal to, or less than and closest to the arrival time, when a first tool of the tools has a first remain operation time which is equal to, or less than and closest to the arrival time, processing the lot with the first tool of the tools in the process stage after dispatching the lot to the processing stage, and generating at least one semiconductor device from the lot based on the comparing, determining and processing.

Abstract: A method is disclosed that includes the operations below. A lot is dispatched for N process stages of process stages, according to arrival durations of the lot arrived at the N process stages and process durations of the lot predetermined to be processed at the N process stages, in which N is a positive integer. A first tool of tools at each one of the N process stages are assigned for the lot, in which the lot is configured to be dispatched to the first tool at a first process stage of the N process stages according to a first arrival duration of the arrival durations of the lot arrived at the first process stage and remain operation durations of the tools at the first process stage.

Abstract: A method is disclosed that includes the operations below. A lot is dispatched for N process stages of process stages, according to arrival durations of the lot arrived at the N process stages and process durations of the lot predetermined to be processed at the N process stages, in which N is a positive integer. A first tool of tools at each one of the N process stages are assigned for the lot, in which the lot is configured to be dispatched to the first tool at a first process stage of the N process stages according to a first arrival duration of the arrival durations of the lot arrived at the first process stage and remain operation durations of the tools at the first process stage.