Patents by Inventor YUAN-KAI TAO

YUAN-KAI TAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070087480
    Abstract: The present invention relates to a method for manufacturing a semiconductor chip package structure including the following steps. A substrate is provided. A plurality of chips are assembled onto the substrate and are electrically connected with the substrate. A stiffener is assembled onto the substrate and the stiffener has a top surface and a bottom surface facing the substrate. A molding compound is formed to cover the semiconductor chip, the substrate, the top surface and the bottom surface of the stiffener. Afterwards, a singulation step is performed to cut the molding compound, the substrate and the stiffener.
    Type: Application
    Filed: December 20, 2006
    Publication date: April 19, 2007
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Su TAO, Kuang-Lin Lo, Tsung-Sheng Lee, Yaw-Yuh Yang, Yuan-Kai Tao
  • Publication number: 20040124515
    Abstract: The present invention relates to a method for manufacturing a semiconductor chip package structure including the following steps. A substrate is provided. A plurality of chips are assembled onto the substrate and are electrically connected with the substrate. A stiffener is assembled onto the substrate and the stiffener has a top surface and a bottom surface facing the substrate. A molding compound is formed to cover the semiconductor chip, the substrate, the top surface and the bottom surface of the stiffener. Afterwards, a singulation step is performed to cut the molding compound, the substrate and the stiffener.
    Type: Application
    Filed: September 3, 2003
    Publication date: July 1, 2004
    Inventors: SU TAO, KUANG-LIN LO, TSUNG-SHENG LEE, YAW-YUH YANG, YUAN-KAI TAO