Patents by Inventor Yuanlun ZHANG

Yuanlun ZHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20240195372
    Abstract: An amplifier of an input circuit includes: a first PMOS transistor having a gate connected to a first node, a source connected to a second node, and a drain connected to a third node; a second PMOS transistor having a gate connected to a fourth node that inputs a reference signal, a source connected to the second node, and a drain connected to a fifth node; a current source connected between a power supply voltage and the second node; a load circuit connected between the third node and a ground voltage; a first NMOS transistor having a gate connected to the first node, a drain connected to the power supply voltage, and a source connected to the fifth node; and a second NMOS transistor having a gate connected to the fourth node, a drain connected to the power supply voltage, and a source connected to the third node.
    Type: Application
    Filed: October 18, 2023
    Publication date: June 13, 2024
    Applicant: Kioxia Corporation
    Inventors: Yutaka SHIMIZU, Yasuhiro HIRASHIMA, Isao FUJISAWA, Michael BURGHART, Yuanlun ZHANG