Abstract: A method for downgrading firmware in a controller is provided. The method includes receiving a request, by the controller, to downgrade the firmware from a current version to an older version. For a feature implemented in the current version and not implemented in the older version, the method includes determining if the feature is currently in-use by the controller. If the feature is currently in-use by the controller, the method includes warning a user and abandoning the request. If the feature is not currently in-use by the controller, the method includes checking other features implemented in the current version and not implemented in the older version, and repeating determining, providing, abandoning, and checking, and downgrading the firmware, if all of the features implemented in the current version and not implemented in the older version are not currently in-use by the controller.

Abstract: A method for downgrading firmware in a controller is provided. The method includes receiving a request, by the controller, to downgrade the firmware from a current version to an older version. For a feature implemented in the current version and not implemented in the older version, the method includes determining if the feature is currently in-use by the controller. If the feature is currently in-use by the controller, the method includes warning a user and abandoning the request. If the feature is not currently in-use by the controller, the method includes checking other features implemented in the current version and not implemented in the older version, and repeating determining, providing, abandoning, and checking, and downgrading the firmware, if all of the features implemented in the current version and not implemented in the older version are not currently in-use by the controller.

Abstract: A storage controller that operates under elevated temperature conditions includes a memory, a memory controller, and a CPU that detects a temperature of the memory controller has exceeded a threshold while operating at a first frequency and responsively places the memory into self-refresh mode, reduces the memory controller frequency to a second frequency, and then takes the memory out of self-refresh mode. The clock frequency of a bus bridge or communications link circuit may also be reduced when their temperatures exceed a threshold. The bus bridge may deny access to requestors of access to the memory while the frequency is being reduced. Message transfers on a communications link between redundant storage controllers in a system may be suspended while the link frequency is being reduced. Finally, the system may fail over to one controller while the other controller reduces the frequencies and then fail back.

Abstract: Methods and systems for preventing permanent data loss due to a single failure in an array of storage devices are described. In particular, a defective memory block is detected and data that was on the now defective memory block is reconstructed using backup data in the array. The reconstructed data is stored in a replacement memory block, without requiring the rewriting of data in non-defective memory blocks. The information mapping the defective memory block to the replacement memory block may be stored as metadata on a storage device.

Abstract: Methods and apparatuses for facilitating the management of multiple controller code versions for implementing operational aspects of storage system controllers are provided. In particular, multiple versions of storage controller code are loaded into the physical memory of a storage controller. The logical region in which a particular controller code version is loaded may be designated in metadata as a primary, secondary or other region. The controller code that is associated with a logical version designated as the primary region is selected by the storage controller for execution upon a storage controller reboot. Accordingly, time consuming copy operations are not required in order to switch between different versions of storage controller code.

Abstract: A RAID system includes a non-volatile memory storing a first program and first and second copies of a second program, and a processor executing the first program. The first program detects the first copy of the second program is failed and repairs the failed first copy in the non-volatile memory using the second copy. The failures may be detected at boot time or during normal operation of the controller. In one embodiment, the failure is detected via a CRC check. In one embodiment, the controller repairs the failed copy by copying the good copy to the location of the failed copy. In one embodiment, the system includes multiple controllers, each having its own processor and non-volatile memory and program that detects and repairs failed program copies. The programs include a loader, an application, FPGA code, CPLD code, and a program for execution by a power supply microcontroller.

Abstract: A storage controller has a capacitor pack for storing energy to supply power during a main power loss, a temperature sensor that senses the capacitor pack temperature, and a CPU, which detects that the temperature of the capacitor pack has risen above a predetermined threshold while operating at a first voltage value and determines whether a projected lifetime of the capacitor pack is less than the warranted lifetime. If the projected lifetime is less than the warranted lifetime, the CPU reduces the operating voltage of the capacitor pack to a second value, in order to increase the capacitor pack lifetime. In one embodiment, the CPU reduces the voltage if an accumulated normalized running time of the capacitor pack is greater than an accumulated calendar running time. In another embodiment, the CPU reduces the voltage if a percentage capacitance drop of the capacitor pack is greater than a calendar percentage capacitance drop.

Abstract: The present invention is directed to a data storage system utilizing a number of data storage devices. The data storage system features one or more storage device sleds, which may each carry multiple storage devices. Each storage device sled and its interconnected storage devices may comprise a field replaceable unit. In response to the detection of a failure associated with a field replaceable unit, information related to that failure may be stored in memory or storage associated with the field replaceable unit. Repair personnel may access the stored information in order to positively identify the failed component of the field replaceable unit in connection with the repair or replacement of that component, in order to return the field replaceable unit to service.

Abstract: A fault tolerant storage controller having a processor, redundant copies of a stored program, and a timer that automatically runs when the processor is reset is disclosed. Selection logic selects a first copy of the program to boot on the processor. If the timer expires before the first copy successfully boots, the timer resets the processor and re-enables itself to run again. This time, selection logic selects a second copy of the stored program. In one embodiment, the program comprises separate loader and application programs, each having a redundant copy. The loader re-enables the timer when jumping to the first copy of the application code. If the timer expires before the first application copy successfully boots, the timer resets the processor and re-enables itself to run again. This time, the loader selects a second copy of the application program. In one embodiment, the redundant copies are stored in separate FLASH devices; in another, in distinct regions of the same FLASH device.

Abstract: A storage controller has a capacitor pack for storing energy to supply during a main power loss, a temperature sensor that senses the capacitor pack temperature, and a CPU, which repeatedly: receives the temperature during an interval over which the capacitor pack is operated, determines a lifetime over which the capacitor pack would have a capacity to store at least a predetermined amount of energy if operated at the temperature during the lifetime, normalizes the interval by a ratio of a warranted lifetime of the capacitor pack relative to the determined lifetime, and adds the normalized interval to an accumulated normalized running time. The operating voltage of the capacitor pack may also sampled and used to determine the lifetime. The predetermined amount of energy may be for backing up a volatile write cache to a non-volatile memory in response to the loss of main power.

Abstract: A high data availability write-caching storage controller has a volatile memory with a write cache for caching write cache data, a non-volatile memory, a capacitor pack for supplying power for backing up the write cache to the non-volatile memory in response to a loss of main power, and a CPU that determines whether reducing an operating voltage of the capacitor pack to a new value would cause the capacitor pack to be storing less energy than required for backing up the current size write cache to the non-volatile memory. If so, the CPU reduces the size of the write cache prior to reducing the operating voltage. The CPU estimates the capacity of the capacitor pack to store the required energy based on a history of operational temperature and voltage readings of the capacitor pack, such as on an accumulated normalized running time and warranted lifetime of the capacitor pack.

Abstract: A storage controller that operates under elevated temperature conditions includes a memory, a memory controller, and a CPU that detects a temperature of the memory controller has exceeded a threshold while operating at a first frequency and responsively places the memory into self-refresh mode, reduces the memory controller frequency to a second frequency, and then takes the memory out of self-refresh mode. The clock frequency of a bus bridge or communications link circuit may also be reduced when their temperatures exceed a threshold. The bus bridge may deny access to requestors of access to the memory while the frequency is being reduced. Message transfers on a communications link between redundant storage controllers in a system may be suspended while the link frequency is being reduced. Finally, the system may fail over to one controller while the other controller reduces the frequencies and then fail back.

Abstract: The present invention provides for a data storage system having a number of virtual storage devices. Each of the virtual storage devices may include a number of physical storage devices. The physical storage devices need not be separately addressable by a host system. Each virtual storage device unit may comprise a field replaceable unit encompassing no more than a single virtual storage device. Physical storage devices included in a virtual storage device that are not in active use may be powered down, even while one or more other physical devices included in that virtual storage device are powered up.

Abstract: A data storage system configured for efficient operation in a single controller mode and to facilitate an upgrade from single controller operation to dual redundant active-active controller operation is provided. More particularly, a first controller having a segmented write cache is provided. The first segment of the write cache is associated with logical unit numbers (LUNs) owned by the first controller. The second segment is associated with LUNs that are designated as being owned by a second controller. During single controller operation, the segments of the write cache operate as primary write cache. The system may be converted to dual redundant controller operation by adding a second controller having a write cache segmented like the write cache of the first controller. Upon adding a second controller, primary control of the LUNs owned by or zoned to the second controller is taken over by the second controller.