Abstract: Systems, methods, and non-transitory computer readable media can provide a workflow associated with a page of a social networking system. A page can be generated in response to completion of the workflow by a user. The page status card can be provided for display on the page.

Abstract: A DC-to-DC converter comprises a first switch, a second switch coupled to the first switch, an inductor, and a plurality of serially connected power transistors. The first switch is to couple an input voltage to a common node. The first and second switches to be turned on and off in a reciprocating manner so as to couple either the input voltage or ground to the common node. The inductor, connecting the common node to an output voltage node of the DC-to-DC converter, is configured to control a voltage at the output voltage node based on current flowing through the inductor. The plurality of power transistors are concurrently controlled by a first signal that is based on a value of a voltage at the common node and a supply voltage, the serially connected power transistors to control an amount of current flowing through the inductor. Moreover, the first signal is used to prevent a high voltage drop from overstressing the plurality of power transistors while the first switch is on.

Abstract: A DC-to-DC converter comprises a first switch, a second switch coupled to the first switch, an inductor, and a plurality of serially connected power transistors. The first switch is to couple an input voltage to a common node. The first and second switches to be turned on and off in a reciprocating manner so as to couple either the input voltage or ground to the common node. The inductor, connecting the common node to an output voltage node of the DC-to-DC converter, is configured to control a voltage at the output voltage node based on current flowing through the inductor. The plurality of power transistors are concurrently controlled by a first signal that is based on a value of a voltage at the common node and a supply voltage, the serially connected power transistors to control an amount of current flowing through the inductor. Moreover, the first signal is used to prevent a high voltage drop from overstressing the plurality of power transistors while the first switch is on.

Abstract: Various apparatuses and methods for protecting a transmitter from electrostatic discharge are disclosed herein. For example, some embodiments provide an apparatus including a first ESD clamp connected to an antenna input, a first reactive component connected to the first ESD clamp, a second ESD clamp connected to the first reactive component, and a second reactive component connected between the second ESD clamp and the transmitter.

Abstract: A low noise amplifier in an integrated circuit, the circuit having a digital portion and an analog portion on a common substrate, the digital portion having at least one clocking frequency, includes an input configured to receive a signal at a tuned frequency and an output circuit. The output circuit is configurable to operate in either a single-ended mode or a pseudo differential-ended mode, wherein the output circuit is configured in the pseudo differential-ended mode when the tuned frequency is substantially similar to the at least one clocking frequency or one of its harmonics and otherwise configured in the single-ended mode.

Abstract: Various apparatuses and methods for protecting a transmitter from electrostatic discharge are disclosed herein. For example, some embodiments provide an apparatus including a first ESD clamp connected to an antenna input, a first reactive component connected to the first ESD clamp, a second ESD clamp connected to the first reactive component, and a second reactive component connected between the second ESD clamp and the transmitter.

Abstract: A low noise amplifier in an integrated circuit, the circuit having a digital portion and an analog portion on a common substrate, the digital portion having at least one clocking frequency, includes an input configured to receive a signal at a tuned frequency and an output circuit. The output circuit is configurable to operate in either a single-ended mode or a pseudo differential-ended mode, wherein the output circuit is configured in the pseudo differential-ended mode when the tuned frequency is substantially similar to the at least one clocking frequency or one of its harmonics and otherwise configured in the single-ended mode.

Abstract: This disclosure provides, in one aspect, a current signal generating circuit for generating a current source for use by on- or off-chip components. In one embodiment, the circuit comprises an on-chip output current circuit configured to generate an output current and a reference current based on an input voltage. In this embodiment, the output current is substantially proportional to the reference current. The circuit also includes an on-chip resistive element coupled to the output current circuit and having a resistance configured to regulate the output current using the reference current. In such an embodiment, the resistance varies according to a temperature of the resistive element. In addition, the circuit includes an on-chip temperature compensation circuit coupled to the output current circuit and the on-chip resistive element, and configured to compensate for the varying resistance by adjusting the reference current in accordance with the varying resistance of the resistive element.

Abstract: This disclosure provides, in one aspect, a current signal generating circuit for generating a current source for use by on- or off-chip components. In one embodiment, the circuit comprises an on-chip output current circuit configured to generate an output current and a reference current based on an input voltage. In this embodiment, the output current is substantially proportional to the reference current. The circuit also includes an on-chip resistive element coupled to the output current circuit and having a resistance configured to regulate the output current using the reference current. In such an embodiment, the resistance varies according to a temperature of the resistive element. In addition, the circuit includes an on-chip temperature compensation circuit coupled to the output current circuit and the on-chip resistive element, and configured to compensate for the varying resistance by adjusting the reference current in accordance with the varying resistance of the resistive element.