Patents by Inventor Yu-Bin Lin

Yu-Bin Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9640413
    Abstract: Provided is an etching-before-packaging horizontal chip three-dimensional system level metal circuit board structure comprising a metal substrate frame; the metal substrate frame is provided with base islands and pins therein; the front faces of the base islands are provided with chips; the front faces of the chips are connected to the front faces of the pins via metal wires; conductive posts are disposed on the front faces or back faces of the pins; the peripheral areas of the base islands, the areas between the base islands and the pins, the areas between the pins, the areas above the base islands and the pins, the areas below the base islands and the pins, and the exteriors of the chips, the metal wires and the conductive posts are all encapsulated with molding compound.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: May 2, 2017
    Assignee: Jiangsu Changjiang Electronics Technology Co., Ltd
    Inventors: Steve Xin Liang, Chih-Chung Liang, Yu-Bin Lin, Yaqin Wang, Youhai Zhang
  • Patent number: 9633985
    Abstract: A first-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and a processing method for manufacturing the same are provided. The structure includes: a die pad (1); a lead (2); a chip (4) provided on a top surface of the die pad (1) by a conductive or non-conductive adhesive material (3); a metal wire (5) via which a top surface of the chip (4) is connected to a top surface of the lead (2); a conductive pillar (6) provided on the surface of the lead (2); and a molding material (7).
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: April 25, 2017
    Assignee: Jiangsu Changjiang Electronics Technology Co., Ltd
    Inventors: Chih-Chung Liang, Yaqin Wang, Chunyan Zhang, Yu-Bin Lin, Youhai Zhang
  • Publication number: 20160372450
    Abstract: A first-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and a processing method for manufacturing the same are provided. The structure includes: a die pad (1); a lead (2); a chip (4) provided on a top surface of the die pad (1) by a conductive or non-conductive adhesive material (3); a metal wire (5) via which a top surface of the chip (4) is connected to a top surface of the lead (2); a conductive pillar (6) provided on the surface of the lead (2); and a molding material (7).
    Type: Application
    Filed: January 8, 2014
    Publication date: December 22, 2016
    Inventors: Chih-Chung Liang, Yaqin Wang, Chunyan Zhang, Yu-Bin Lin, Youhai Zhang
  • Publication number: 20160372338
    Abstract: Provided is an etching-before-packaging horizontal chip three-dimensional system level metal circuit board structure comprising a metal substrate frame; the metal substrate frame is provided with base islands and pins therein; the front faces of the base islands are provided with chips; the front faces of the chips are connected to the front faces of the pins via metal wires; conductive posts are disposed on the front faces or back faces of the pins; the peripheral areas of the base islands, the areas between the base islands and the pins, the areas between the pins, the areas above the base islands and the pins, the areas below the base islands and the pins, and the exteriors of the chips, the metal wires and the conductive posts are all encapsulated with molding compound.
    Type: Application
    Filed: December 2, 2013
    Publication date: December 22, 2016
    Inventors: Steve Xin Liang, Chih-Chung Liang, Yu-Bin Lin, Yaqin Wang, Youhai Zhang
  • Publication number: 20160163622
    Abstract: Provided are a packaging-before-etching flip chip 3D system-level metal circuit board structure and technique thereof. The metal circuit board structure comprises a metal substrate frame; the front face of the metal substrate frame is provided with pins; the front faces of the pins are provided with conductive posts; chips are installed in a flip manner between the pins via underfills; the peripheral areas of the pins, the conductive posts and the chip are encapsulated with molding compound, the top of the molding compound being parallel to the tops of the conductive posts; and the surfaces of the metal substrate frame, the pins and the conductive posts exposing out of the molding compounds are provided with an anti-oxidation layer, thus solving the problem of limited functionality and application of a traditional metal lead frame due to the fact that objects cannot be embedded therein.
    Type: Application
    Filed: December 3, 2013
    Publication date: June 9, 2016
    Inventors: Steve Xin Liang, Chih-Chung Lilang, Yu-Bin Lin, Yaqin Wang, Youhai Zhang
  • Publication number: 20160148861
    Abstract: A first-packaged and later-etched three-dimensional flip-chip system-in-package structure and a processing method thereof are provided. The package structure includes: a pad (1), a pin (2); a conductive pillar (3) disposed on an upper surface of the pin (2); a first die (4) flipped on an upper surface of the pad (1); a first molding material or epoxy resin (9) for encapsulating with a peripheral region of the conductive pillar (3) and the first die (4); an anti-oxidation layer (11) provided on a surface of the conductive pillar (3) exposed from the first molding material or epoxy resin (9); a second die (8) flipped on a lower surface of the pad (1) and the pin (2); and a second molding material or epoxy resin (10) for encapsulating with the region of the lower surfaces of the pad (1) and the pin (2) and a peripheral region of the second die (8).
    Type: Application
    Filed: December 19, 2013
    Publication date: May 26, 2016
    Inventors: Chih-Chung Liang, Steve Xin Liang, Yu-bin Lin, Kai Zhang, Chunyan Zhang
  • Publication number: 20160141233
    Abstract: The present invention relates to a first-packaged and later-etched normal chip three dimension-on-chip metal circuit board structure and a processing method for manufacturing the same, the structure includes: metal substrate frame (1); a lead (3) provided in the metal substrate frame (1); a conductive pillar (4) provided in a top surface of the lead (3); a chip is mounted normally on a top surface of the metal circuit frame (1) or between the leads (3); a metal wire (6) via which a top surface of the chip (5) is connected to a top surface of the lead (3); a molding material (8) with which a periphery region of the lead (3), the conductive pillar (4), the chip (5) and the metal wire (6) is encapsulated, with the molding material (8) being flushed with a top of the conductive pillar (4).
    Type: Application
    Filed: January 7, 2014
    Publication date: May 19, 2016
    Inventors: Steve Xin Liang, Chih-Chung Liang, Yu-Bin Lin, Yaqin Wang, Youhai Zhang
  • Publication number: 20150171233
    Abstract: An ultraviolet sensor includes a p-type doping substrate, an n-type doping region and an ultraviolet pass filter layer. The n-type doping region is formed on a surface of the p-type doping substrate. The ultraviolet pass filter layer is disposed in correspondence with the n-type doping region. The n-type doping region is located between the ultraviolet pass filter layer and the p-type doping substrate. An ultraviolet sensing apparatus includes an ultraviolet sensor, an auxiliary light sensor and a processing circuit. The ultraviolet sensor generates an ultraviolet sensing result in response to surrounding light. The auxiliary light sensor generates an auxiliary light sensing result in response to the surrounding light. The auxiliary light sensor and the ultraviolet sensor have different detection wave ranges. The processing circuit performs manipulation upon the auxiliary light sensing result according to the ultraviolet sensing result, and accordingly obtains a compensated ultraviolet sensing result.
    Type: Application
    Filed: December 9, 2014
    Publication date: June 18, 2015
    Inventors: TOM CHANG, Kao-Pin Wu, Shang-Ming Hung, Chih-Jen Fang, Yu-Bin Lin