Abstract: The present disclosure provides an off-chip memory address scrambling apparatus and method for a system on chip. The apparatus includes a true random number generator, a key memory and an on-chip security controller. The on-chip security controller is connected to the true random number generator, the key memory and an off-chip memory respectively and is configured to read or write data in the off-chip memory and perform address scrambling processing on the data.

Abstract: Embodiments of the disclosure provide a method and apparatus for upgrading a system version of a system. The method can include: acquiring, using circuitry, from a first storage space a current system version identification corresponding to a current system version; acquiring, using circuitry, from a second storage space a backup system version identification corresponding to a backup system version; comparing, using circuitry, the current system version identification with the backup system version identification; and configuring the system based on the comparison.

Abstract: A storage apparatus and method for address scrambling. The apparatus includes: a key-generating module (11) configured to generate a random key; a non-volatile key memory (12) configured to store the random key generated by the key-generating module (11); a key-reading module (13) configured to automatically read the random key stored in the non-volatile key memory (12) and store the random key; a memory control module (15) configured to output, to an address scrambling module (14), an unscrambled address in generated sequential control logic for reading or writing an on-chip memory; and the address scrambling module (14) connected to the memory control module (15), the key-reading module (13), and the memory (16), respectively, and configured to perform, according to the random key read by the key-reading module (13), scrambling processing on the unscrambled address outputted by the memory control module (15) to form a scrambled address, and send the scrambled address to the memory (16).

Abstract: The present disclosure provides an off-chip memory address scrambling apparatus and method for a system on chip. The apparatus includes a true random number generator, a key memory and an on-chip security controller. The on-chip security controller is connected to the true random number generator, the key memory and an off-chip memory respectively and is configured to read or write data in the off-chip memory and perform address scrambling processing on the data.

Abstract: Embodiments of the disclosure provide a method and apparatus for upgrading a system version of a system. The method can include: acquiring, using circuitry, from a first storage space a current system version identification corresponding to a current system version; acquiring, using circuitry, from a second storage space a backup system version identification corresponding to a backup system version; comparing, using circuitry, the current system version identification with the backup system version identification; and configuring the system based on the comparison.