Patents by Inventor Yucheon JU

Yucheon JU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device including test control circuit
    Patent number: 11443824
    Abstract: A memory device includes a memory cell array, an input/output circuit, a test register circuit, and a test control block. The memory cell array is suitable for storing data. The input/output circuit is suitable for inputting and outputting the data stored in the memory cell array. The test register circuit is suitable for testing the input/output circuit. The test control block includes a replica circuit having a replica configuration of the test register circuit by modeling the test register circuit, and is suitable for generating the data to test the test register circuit.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: September 13, 2022
    Assignee: SK hynix Inc.
    Inventors: Yucheon Ju, Hosung Cho
  • MEMORY DEVICE INCLUDING TEST CONTROL CIRCUIT
    Publication number: 20210174889
    Abstract: A memory device includes a memory cell array suitable for storing data, an input/output circuit suitable for inputting and outputting the data stored in the memory cell array, a test register circuit suitable for testing the input/output circuit, and a test control block comprising a replica circuit configured by modeling the test register circuit, and suitable for generating data to test the test register circuit.
    Type: Application
    Filed: May 27, 2020
    Publication date: June 10, 2021
    Applicant: SK hynix Inc.
    Inventors: Yucheon JU, Hosung CHO