Abstract: A data transmission method, apparatus, and system are applied to the field of communication technologies. The method includes: performing demultiplexing processing on obtained y first data streams to obtain x second data streams, where the y first data streams are obtained through bit multiplexing processing; mapping the x second data streams at a granularity of n bits to obtain z third data streams; and outputting the z third data streams over an output lane, where y, x, n, and z are all positive integers, and n?2. The method may be applied to an Ethernet high-speed interface.

Abstract: According to embodiments of the present disclosure, a method and a chip for cyclic code encoding, a circuit component, and an electronic device are provided. The method includes: generating, based on a first symbol sequence related to a first part of symbols in the K payload symbols, a first parity sequence corresponding to the first symbol sequence; generating, based on a second symbol sequence related to a second part of symbols in the K payload symbols, a second parity sequence corresponding to the second symbol sequence, where the first part of symbols are different from the second part of symbols; generating the (N?K) parity symbols based on the first parity sequence and the second parity sequence.

Abstract: A data transmission method is performed by a first node, and the first node includes X encoding units that perform encoding in a first FEC mode. The method includes: first dividing, by the first node, to-be-encoded data into X groups of initial data, and encoding the X groups of initial data one by one by using the X encoding units, to obtain X groups of encoded data; and then distributing, by the first node, the X groups of encoded data to L links, to send the X groups of encoded data to a second node. Both X×N and X×K are integer multiples of L, N represents a length of a codeword of the first FEC mode, K represents a length of valid information bits in the codeword, and amounts of encoded data distributed to different links are the same.

Abstract: Embodiments of this application provide a balance-unbalance conversion apparatus. The apparatus includes an insulation substrate, a first microstrip, a second microstrip, and a conductive ground. The first microstrip includes a first balance signal connection section, a first impedance matching section, and an unbalance signal connecting section. The unbalance signal connecting section is configured to transmit an unbalance signal. The second microstrip includes a second balance signal connecting section, a second impedance matching section, and a ground section. The second balance signal connecting section is configured to transmit a second component of the balance signal. The ground section is configured to connect to a ground signal. The first microstrip, the second microstrip, and the conductive ground are all disposed on the insulation substrate, and a cross-sectional area of at least a part of the first microstrip and/or at least a part of the second microstrip is gradient.

Abstract: This application discloses example data encoding methods, data decoding methods, and communication apparatuses. One example data encoding method includes generating M encoding units and distributing the M encoding units to N transmission channels. The M encoding units are obtained by encoding L frames. The M encoding units include at least one first-type unit. A first-type unit of the at least one first-type unit includes a first identifier. The first identifier indicates a start location that is in the first-type unit and that is of a frame header of a first frame in the L frames. M, N, and L are integers greater than or equal to 1.

Abstract: This disclosure provides a retransmission method and a communication apparatus, applicable to a wireless or wired communication system. One example method includes: After receiving a signal from a second device, a first device performs first decoding on the signal, then determines whether an error occurs in the signal and a first quantity, and determines, based on a relationship between the first quantity and a first threshold, whether to request the second device to send a first data block, where the first quantity is a quantity of errors that occur in the signal received from the second device, the signal is used to transmit the first data block, and the first threshold is a maximum quantity of errors that can be corrected when the first device decodes the first data block.

Abstract: A data transmission method and a network device are provided. The method includes: obtaining a to-be-transmitted first MAC packet; obtaining a first data control subframe by using field space of a first field of the first MAC packet, and obtaining a first target data subframe based on a second field of the first MAC packet, where the first data control subframe includes a sequence number of the first target data subframe; and transmitting a first frame including the first data control subframe and the first target data subframe to a target network device. A source network device uses space of the first field to generate the first data control subframe used for retransmission control.

Abstract: Embodiments of this application disclose an encoding method and a related device. The method includes: receiving a to-be-encoded code block whose length is L, where L is a positive integer; and encoding the to-be-encoded code block to obtain a forward error correction FEC code, where a valid information length K of the FEC code is an integer multiple of a largest prime factor of L, and a total length N of the FEC code is a sum of K and a product of 2 and an error correction capability T of the FEC code. According to the embodiments of this application, it can be ensured that an FEC codeword satisfies a requirement for a low latency and a high gain.

Abstract: Embodiments of this application disclose example phase detection methods, phase detection circuits, and clock recovery apparatuses. One example method includes receiving a first signal and deciding a (2M?1) level of the first signal to obtain a decision result, where the first signal is a (2M?1)-level signal, and M is a positive integer. A response amplitude parameter of a transmission channel can then be obtained. Clock phase information in the first signal can then be extracted based on the first signal, the decision result, and the response amplitude parameter. Output clock phase information can then be determined based on at least three decision results and at least three pieces of clock phase information in at least three symbol periods.

Abstract: Methods, systems, and apparatus for error correction are provided. In one aspect, an error correction method includes: obtaining an output signal and an amplitude value of a feed forward equalizer (FFE), the amplitude value being a channel response amplitude value corresponding to an equivalent channel of the FFE, performing level decision on the output signal based on the amplitude value to obtain a first decision signal including (2M?1) decision symbols, M being an integer not less than 2, performing (1/(1+D)) decoding on the first decision signal to obtain a first decoded signal, determining a second decision signal based on the first decoded signal, the second decision signal including (M?1) decision symbols, determining that a burst error occurs in the second decision signal if an absolute value of the second decision signal is greater than (M?1), and correcting the burst error in the second decision signal.

Abstract: A data transmission apparatus, a data transmission system, and a data transmission method for implementing flexible Ethernet (FlexE) data transmission in an upstream/downstream asymmetric manner includes obtaining a plurality of first data packets that come from different Media Access Control (MAC) clients, where the different MAC clients receive respective second data packets over respective second FlexE virtual links; and sending the plurality of first data packets to a transmit end of the second data packets over a first FlexE virtual link that corresponds to the different MAC clients.

Abstract: This application provides an error correction method and apparatus, relates to the field of communications technologies, so as to reduce a bit error rate of a decision feedback equalizer (DFE) and improve equalization performance. The method includes: obtaining a decision signal of a DFE; obtaining at least one of an input signal, an equalized output signal, and a difference of the DFE, where the difference is a difference between a level value of the decision signal and a level value of the equalized output signal; determining a symbol location of an end of burst error of the decision signal based on detection of at least one of the decision signal, the equalized output signal, and the difference; and when the symbol location is detected, performing error correction on the decision signal based on the at least one of the input signal, the equalized output signal, and the difference.

Abstract: A data transmission method, apparatus, and system are applied to the field of communication technologies. The method includes: performing demultiplexing processing on obtained y first data streams to obtain x second data streams, where the y first data streams are obtained through bit multiplexing processing; mapping the x second data streams at a granularity of n bits to obtain z third data streams; and outputting the z third data streams over an output lane, where y, x, n, and z are all positive integers, and n?2. The method may be applied to an Ethernet high-speed interface.

Abstract: This application relates to the communications field, and discloses an encoding method, a decoding method, an encoding apparatus, and a decoding apparatus. The encoding method includes: receiving a data bitstream; performing forward error correction FEC encoding on the data bitstream to obtain X Reed-Solomon RS outer codes, where each of the X RS outer codes includes N1 symbols, K1 of the N1 symbols are payload symbols; and performing FEC encoding on the X RS outer codes to obtain Y RS inner codes, where each of the Y RS inner codes includes N2 symbols, K2 of the N2 symbols are payload symbols. According to this application, error correction performance of FEC decoding can be improved.

Abstract: Embodiments of this application provide a balance-unbalance conversion apparatus. The apparatus includes an insulation substrate, a first microstrip, a second microstrip, and a conductive ground. The first microstrip includes a first balance signal connection section, a first impedance matching section, and an unbalance signal connecting section. The unbalance signal connecting section is configured to transmit an unbalance signal. The second microstrip includes a second balance signal connecting section, a second impedance matching section, and a ground section. The second balance signal connecting section is configured to transmit a second component of the balance signal. The ground section is configured to connect to a ground signal. The first microstrip, the second microstrip, and the conductive ground are all disposed on the insulation substrate, and a cross-sectional area of at least a part of the first microstrip and/or at least a part of the second microstrip is gradient.

Abstract: This application provides an encoding method. The method includes: determining a frame of an outer code of to-be-encoded data, where the frame of the outer code includes a data information code and a check code of the data information code, the frame of the outer code is divided into Q data blocks, each data block in the Q data blocks includes W bits, and W and Q are integers greater than 0; and encoding the Q data blocks to obtain Q codewords of an inner code, where the Q data blocks are in a one-to-one correspondence with the Q codewords of the inner code, a first codeword in the Q codewords of the inner code includes a first data block and a check code of the first data block, the first codeword is any codeword in the Q codewords of the inner code.

Abstract: Embodiments of this application disclose an encoding method and a related device. The method includes: receiving a to-be-encoded code block whose length is L, where L is a positive integer; and encoding the to-be-encoded code block to obtain a forward error correction FEC code, where a valid information length K of the FEC code is an integer multiple of a largest prime factor of L, and a total length N of the FEC code is a sum of K and a product of 2 and an error correction capability T of the FEC code. According to the embodiments of this application, it can be ensured that an FEC codeword satisfies a requirement for a low latency and a high gain.

Abstract: Embodiments of this application disclose an error correction method and apparatus. The method includes: obtaining an output signal and an amplitude value of a feed forward equalizer FFE, where the amplitude value is a channel response amplitude value corresponding to an equivalent channel of the FFE; performing level decision on the output signal based on the amplitude value to obtain a first decision signal, where the first decision signal includes (2M?1) decision symbols, and M is an integer not less than 2; performing (1/(1+D)) decoding on the first decision signal to obtain a first decoded signal, and determining the first decoded signal as a second decision signal, where the second decision signal includes (M?1) decision symbols; if an absolute value of the second decision signal is greater than (M?1), determining that a burst error occurs in the second decision signal; and correcting the burst error.

Abstract: Embodiments of this application disclose a phase detection method, a phase detection circuit, and a clock recovery apparatus. The method includes: receiving a first signal, and deciding a (2M?1) level of the first signal to obtain a decision result, where the first signal is a (2M?1)-level signal, and M is a positive integer: obtaining a response amplitude parameter of a transmission channel; extracting clock phase information in the first signal based on the first signal, the decision result, and the response amplitude parameter; and determining output clock phase information based on at least three decision results and at least three pieces of clock phase information in at least three symbol periods.

Abstract: This application relates to the communications field, and discloses an encoding method, a decoding method, an encoding apparatus, and a decoding apparatus. The encoding method includes: receiving a data bitstream; performing forward error correction FEC encoding on the data bitstream to obtain X Reed-Solomon RS outer codes, where each of the X RS outer codes includes N1 symbols, K1 of the N1 symbols are payload symbols; and performing FEC encoding on the X RS outer codes to obtain Y RS inner codes, where each of the Y RS inner codes includes N2 symbols, K2 of the N2 symbols are payload symbols. According to this application, error correction performance of FEC decoding can be improved.