Abstract: The present invention provides a circuit board having excellent productivity, particularly a circuit board having excellent productivity with respect to a semiconductor layer and source layer forming step, a display device, and a process for producing a circuit board. The circuit board of the present invention is a circuit board including an oxide semiconductor layer and an electrode connected to the oxide semiconductor layer, wherein the electrode is formed by essentially laminating a layer made of a metal other than copper and a layer containing copper.

Abstract: A liquid crystal panel includes boards, a sealing member, an insulating film, an alignment film, and a film forming area control recess. The sealing member is disposed between the boards. The insulating film is formed on an array board. The alignment film is formed to overlap the insulating film on the array board at least in the display area. The film forming area control recess is formed by recessing a section of the insulating film at a position closer to the display area AA relative to the sealing member on the array board. The film forming area control recess is configured such that at least a section of a first side surface on a sealing member side is angled relative to a normal direction to a plate surface of the array board with a smaller angle in comparison to a second side surface on an opposite side.

Abstract: The present invention provides a circuit board having excellent productivity, particularly a circuit board having excellent productivity with respect to a semiconductor layer and source layer forming step, a display device, and a process for producing a circuit board. The circuit board of the present invention is a circuit board including an oxide semiconductor layer and an electrode connected to the oxide semiconductor layer, wherein the electrode is formed by essentially laminating a layer made of a metal other than copper and a layer containing copper.

Abstract: A semiconductor device (100) according to the present invention is a semiconductor device with a thin-film transistor (10), and includes: a gate electrode (62) which has been formed on a substrate (60) as a part of the thin-film transistor (10); a gate insulating layer (66) which has been formed on the gate electrode (62); an oxide semiconductor layer (68) which has been formed on the gate insulating layer (66); a source electrode (70s) and a drain electrode (70d) which have been formed on the oxide semiconductor layer (68); a protective layer (72) which has been formed on the oxide semiconductor layer (68), the source electrode (70s) and the drain electrode (70d); an oxygen supplying layer (74) which has been formed on the protective layer (72); and an anti-diffusion layer (78) which has been formed on the oxygen supplying layer (74).

Abstract: A TFT 1 is formed on a glass substrate 11, and a flattening resin film 17 covering the TFT 1 is formed. Furthermore, a moisture-proof protective film 18 covering the entire surface of the flattening resin film 17 is formed. For the protective film 18, a SiO2 film, a SiN film, a SiON film, or a stacked film thereof is used. The edge surfaces of the flattening resin film 17 are disposed on the inner side of or under a seal 4, and are formed in a tapered shape. By this, the entry of moisture into the flattening resin film 17 is prevented, preventing display degradation. This effect becomes noticeable in a display device including an oxide semiconductor TFT.

Abstract: A TFT substrate (20a) includes a plurality of pixel electrodes (17a) provided in a matrix, a plurality of TFTs (5) each provided for a corresponding one of the pixel electrodes (17a), and a plurality of auxiliary capacitors (6a) each provided for a corresponding one of the pixel electrodes (17a). Each of the auxiliary capacitors (6a) includes a capacitor line (11b) made of a material identical to that of the gate electrode (11aa) of the TFT (5) and provided in a layer identical to that of the gate electrode (11aa) of the TFT (5), the gate insulating film (12) provided so as to cover the capacitor line (11b), and a corresponding one of the pixel electrodes (17a) provided on the gate insulating film (12) so as to overlap with the capacitor line (11b) and being in conduction with a drain electrode (14ca).

Abstract: A thin film transistor includes a gate electrode (11a), a gate insulating film (12a) covering the gate electrode (11a), a semiconductor layer (13a) made of an oxide semiconductor and provided on the gate insulating film (12a), a source electrode (16aa) and a drain electrode (16ab) provided on the semiconductor layer (13a) via easily reducible metal layers (15aa, 15ab) and spaced apart from each other, with a channel region (C) interposed therebetween, a conductive region (E) provided in the semiconductor layer (13a), and a diffusion reducing portion (13ca, 13cb) provided in the semiconductor layer (13a), for reducing diffusion of the conductive region (E) into the channel region (C).

Abstract: The present invention prevents electric corrosion even when metal lines that may cause problems when in direct contact with ITO are used as source/drain lines, without increasing the number of steps for manufacturing a TFT substrate. A semiconductor apparatus includes TFTs that each include: a gate electrode included in a gate layer 11a provided on a substrate 20; a semiconductor element 15 provided above the gate layer 11a with a gate insulating film 21 positioned in between; and a source electrode and a drain electrode included in a source layer 12a located across the semiconductor element 15.

Abstract: A liquid crystal panel 11 includes a display area TFT 17, a non-display area TFT 29, and a first interlayer insulator 39. The display area TFT 17 is disposed in a display area AA of an array board 11b. The non-display area TFT 29 is disposed in a non-display area NAA. The non-display area TFT 29 includes a second gate electrode 29a, a second channel 29d, a second source electrode 29b, and a second drain electrode 29c. The second channel 29d is formed from an oxide semiconductor film 36. The second source electrode 29b is connected to the second channel 29d. The second drain electrode 29c is connected to the second channel 29d. The first interlayer insulator 39 is layered at least on the second source electrode 29b and the second drain electrode 29c. The first interlayer insulator 39 has a multilayer structure including a lower first interlayer insulator 39a and an upper first interlayer insulator 39b.

Abstract: The present invention provides a liquid crystal display capable of enhancing moisture resistance and resist applicability while suppressing alignment disorder of liquid crystal molecules. The present invention relates to a liquid crystal display including: an organic insulating film; a transparent electrode arranged on the organic insulating film; and an interlayer insulating film arranged on the transparent electrode, the transparent electrode including a plasma-treated surface, the organic insulating film being shaved vertically from an end portion of the transparent electrode, and thereby including a step portion under the end portion, the transparent electrode not laterally protruding from the step portion, the step portion having a height of 20 nm or lower.

Abstract: A semiconductor device (100) according to the present invention is a semiconductor device with a thin-film transistor (10), and includes: a gate electrode (62) which has been formed on a substrate (60) as a part of the thin-film transistor (10); a gate insulating layer (66) which has been formed on the gate electrode (62); an oxide semiconductor layer (68) which has been formed on the gate insulating layer (66); a source electrode (70s) and a drain electrode (70d) which have been formed on the oxide semiconductor layer (68); a protective layer (72) which has been formed on the oxide semiconductor layer (68), the source electrode (70s) and the drain electrode (70d); an oxygen supplying layer (74) which has been formed on the protective layer (72); and an anti-diffusion layer (78) which has been formed on the oxygen supplying layer (74).

Abstract: A semiconductor device according to the present invention includes: a gate electrode (62) of a thin film transistor (10) and an oxygen supply layer (64), the gate electrode (62) and the oxygen supply layer (64) being formed on a substrate (60); a gate insulating layer (66) formed on the gate electrode (62) and the oxygen supply layer (64); an oxide semiconductor layer (68) of the thin film transistor (10), the oxide semiconductor layer (68) being formed on the gate insulating layer (66); and a source electrode (70S) and a drain electrode (70d) of the thin film transistor (10), the source electrode (70S) and the drain electrode (70d) being formed on the gate insulating layer (66) and the oxide semiconductor layer (68).

Abstract: A method of manufacturing a TFT substrate includes: forming a gate electrode (12) and a gate insulating film (30) on a substrate (8); forming a source electrode (14) and a drain electrode (15) at a gap from each other on the gate insulating film (30), and forming a drain connection part (16); forming, after the step of forming the source electrode and the drain electrode, an oxide semiconductor layer (18, 18a, 18b) that contains a channel portion connecting the source electrode (14) to the drain electrode (15) and that contains an additional portion (18a) covering the drain connection part (16); oxidizing a surface of the oxide semiconductor layer (18, 18a, 18b); forming a contact hole (22) in an insulating film (32) that covers the oxide semiconductor layer; removing a portion of the additional portion (18a) of the oxide semiconductor layer that is located inside the contact hole (22); and forming a conductive layer (20) that electrically connects the drain connection part (16) that has been exposed.

Abstract: A TFT 20 includes a gate electrode 21, a gate insulating film 22, a semiconductor layer 23, a source electrode 24, a drain electrode 25, etc. The semiconductor layer 23 is comprised of a metal oxide semiconductor (IGZO), and has a source portion 23a that contacts the source electrode 24, a drain electrode 23b that contacts the drain electrode 25, and a channel portion 23c that is located between the source and drain portions 23a, 23b. A reduced region 30 is formed at least in the channel portion 23c of the semiconductor layer 23, and the reduced region 30 has a higher content of a simple substance of a metal such as In than the remaining portion of the semiconductor layer 23.

Abstract: The present invention provides a circuit board having excellent productivity, particularly a circuit board having excellent productivity with respect to a semiconductor layer and source layer forming step, a display device, and a process for producing a circuit board. The circuit board of the present invention is a circuit board including an oxide semiconductor layer and an electrode connected to the oxide semiconductor layer, wherein the electrode is formed by essentially laminating a layer made of a metal other than copper and a layer containing copper.

Abstract: A method of manufacturing a TFT substrate includes: forming a gate electrode (12) and a gate insulating film (30) on a substrate (8); forming a source electrode (14) and a drain electrode (15) at a gap from each other on the gate insulating film (30), and forming a drain connection part (16); forming, after the step of forming the source electrode and the drain electrode, an oxide semiconductor layer (18, 18a, 18b) that contains a channel portion connecting the source electrode (14) to the drain electrode (15) and that contains an additional portion (18a) covering the drain connection part (16); oxidizing a surface of the oxide semiconductor layer (18, 18a, 18b); forming a contact hole (22) in an insulating film (32) that covers the oxide semiconductor layer; removing a portion of the additional portion (18a) of the oxide semiconductor layer that is located inside the contact hole (22); and forming a conductive layer (20) that electrically connects the drain connection part (16) that has been exposed.

Abstract: A semiconductor device of the present invention includes: a lower electrode (110); a contact layer (130) including a first contact layer (132), a second contact layer (134) and a third contact layer (136) overlapping with a semiconductor layer (120); and an upper electrode (140) including a first upper electrode (142), a second upper electrode (144) and a third upper electrode (146). The second contact layer (134) includes a first region (134a), and a second region (134b) separate from the first region (134a), and the second upper electrode (144) is directly in contact with the semiconductor layer (120) in a region between the first region (134a) and the second region (134b) of the second contact layer (134).

Abstract: Disclosed is a thin film transistor wherein an ON current is increased and a leak current is reduced. The channel layer 60 of the TFT 10 is formed of a crystalline silicon, and the lower surface of one end of the channel layer 60 is electrically connected to the surface of an n+ silicon layer 40a, and the lower surface of the other end is electrically connected to the surface of an n+ silicon layer 40b. Furthermore, the side surface of said end of the channel layer 60 is electrically connected to a source electrode 50a, and the side surface of the other end is electrically connected to a drain electrode 50b. Thus, a barrier that makes electrons, which act as carriers, not easily transferred is formed on the boundary between the source electrode 50a and the channel layer 60. As a result, the ON current that flows when the TFT 10 is in the ON state can be increased, and the leak current that flows when the TFT is in the OFF state can be reduced.

Abstract: A thin film transistor includes a gate electrode (11a), a gate insulating film (12a) covering the gate electrode (11a), a semiconductor layer (13a) made of an oxide semiconductor and provided on the gate insulating film (12a), a source electrode (16aa) and a drain electrode (16ab) provided on the semiconductor layer (13a) via easily reducible metal layers (15aa, 15ab) and spaced apart from each other, with a channel region (C) interposed therebetween, a conductive region (E) provided in the semiconductor layer (13a), and a diffusion reducing portion (13ca, 13cb) provided in the semiconductor layer (13a), for reducing diffusion of the conductive region (E) into the channel region (C).

Abstract: A TFT substrate (20a) includes a plurality of pixel electrodes (17a) provided in a matrix, a plurality of TFTs (5) each provided for a corresponding one of the pixel electrodes (17a), and a plurality of auxiliary capacitors (6a) each provided for a corresponding one of the pixel electrodes (17a). Each of the auxiliary capacitors (6a) includes a capacitor line (11b) made of a material identical to that of the gate electrode (11aa) of the TFT (5) and provided in a layer identical to that of the gate electrode (11aa) of the TFT (5), the gate insulating film (12) provided so as to cover the capacitor line (11b), and a corresponding one of the pixel electrodes (17a) provided on the gate insulating film (12) so as to overlap with the capacitor line (11b) and being in conduction with a drain electrode (14ca).