Patents by Inventor Yude Chu
Yude Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10587037Abstract: An electronic package structure is provided, including a substrate, a package encapsulant disposed on the substrate, and an antenna structure corresponding to a disposing area of the package encapsulant and having a first extension layer, a second extension layer disposed on the substrate, and a connection portion disposed between and electrically connected to the first extension layer and the second extension layer. Through the formation of the antenna structure on the disposing area of the package encapsulant, the substrate is not required to be widen, and, as such, the electronic package structure meets the miniaturization requirement.Type: GrantFiled: December 16, 2013Date of Patent: March 10, 2020Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chih-Hsien Chiu, Heng-Cheng Chu, Chien-Cheng Lin, Tsung-Hsien Tsai, Chao-Ya Yang, Yude Chu
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Patent number: 9997477Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.Type: GrantFiled: April 8, 2016Date of Patent: June 12, 2018Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Tsung-Hsien Tsai, Heng-Cheng Chu, Chien-Cheng Lin, Chih-Hsien Chiu, Hsin-Lung Chung, Yude Chu
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Patent number: 9502377Abstract: A semiconductor package is disclosed, which includes: a circuit board; a carrier disposed on the circuit board; an RF chip disposed on the carrier; a plurality of high level bonding wires electrically connecting electrode pads of the RF chip and the circuit board; and an encapsulant formed on the circuit board for encapsulating the carrier, the high level bonding wires and the RF chip. The present invention positions the RF chip at a high level so as to facilitate element arrangement and high frequency wiring on the circuit board, thereby achieving a highly integrated wireless SiP (System in Package) module.Type: GrantFiled: August 20, 2013Date of Patent: November 22, 2016Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chih-Hsien Chiu, Tsung-Hsien Tsai, Chao-Ya Yang, Chia-Yang Chen, Chih-Ming Cheng, Yude Chu
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Patent number: 9502758Abstract: An electronic package is disclosed, which includes: a substrate; at least an electronic element disposed on the substrate; an encapsulant formed on the substrate and encapsulating the electronic element; and an antenna body embedded in the encapsulant without contacting with the substrate and exposed from a surface of the encapsulant. Since the antenna body is not disposed on the substrate, the surface area of the substrate can be reduced to meet the miniaturization requirement of the electronic package.Type: GrantFiled: January 2, 2014Date of Patent: November 22, 2016Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Hsin-Lung Chung, Hao-Ju Fang, Chih-Hsien Chiu, Yude Chu, Tsung-Hsien Tsai
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Publication number: 20160225728Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.Type: ApplicationFiled: April 8, 2016Publication date: August 4, 2016Inventors: Tsung-Hsien Tsai, Heng-Cheng Chu, Chien-Cheng Lin, Chih-Hsien Chiu, Hsin-Lung Chung, Yude Chu
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Patent number: 9355989Abstract: A method of eliminating a defective bonding wire is provided, including moving a bonding member from a first region of a carrier to a second region of the carrier if the bonding wire of the bonding member is defective, and cooperatively operating a movement member and the bonding member so as to cause the defective bonding wire to be removed from the bonding member and bonded to the second region of the carrier, thereby auto-debugging the bonding member and improving the production efficiency.Type: GrantFiled: December 29, 2014Date of Patent: May 31, 2016Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Wei-Sheng Lin, Lien-Chen Chiang, Lung-Tang Hung, Meng-Hung Yeh, Yude Chu
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Patent number: 9337250Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.Type: GrantFiled: November 22, 2013Date of Patent: May 10, 2016Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Tsung-Hsien Tsai, Heng-Cheng Chu, Chien-Cheng Lin, Chih-Hsien Chiu, Hsin-Lung Chung, Yude Chu
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Patent number: 9289846Abstract: A method for fabricating a wire bonding structure is disclosed, which includes: providing a substrate having a plurality of bonding pads; and foaming a ball end of a bonding wire on at least one of the bonding pads by performing a scrubbing process along a path around a periphery of the bonding pad, thereby preventing delamination of the ball end of small size from the bonding pad.Type: GrantFiled: November 21, 2013Date of Patent: March 22, 2016Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Wei-Sheng Lin, Lung-Tang Hung, Meng-Hung Yeh, Zhi-Lun Hsieh, Yude Chu
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Publication number: 20160081234Abstract: A package structure is provided, including an electronic element with a low frequency, a shielding member connected to the electrosnic element, and an encapsulant covering the electronic element and the shielding member, such that the electronic element is shielded from erroneous signals.Type: ApplicationFiled: January 28, 2015Publication date: March 17, 2016Inventors: Chih-Hsien Chiu, Hsin-Lung Chung, Chia-Yang Chen, Chao-Ya Yang, Yude Chu, Chih-Ming Cheng
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Publication number: 20160079198Abstract: A method of eliminating a defective bonding wire is provided, including moving a bonding member from a first region of a carrier to a second region of the carrier if the bonding wire of the bonding member is defective, and cooperatively operating a movement member and the bonding member so as to cause the defective bonding wire to be removed from the bonding member and bonded to the second region of the carrier, thereby auto-debugging the bonding member and improving the production efficiency.Type: ApplicationFiled: December 29, 2014Publication date: March 17, 2016Inventors: Wei-Sheng Lin, Lien-Chen Chiang, Lung-Tang Hung, Meng-Hung Yeh, Yude Chu
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Publication number: 20150145747Abstract: An electronic package is disclosed, which includes: a substrate; at least an electronic element disposed on the substrate; an encapsulant formed on the substrate and encapsulating the electronic element; and an antenna body embedded in the encapsulant without contacting with the substrate and exposed from a surface of the encapsulant. Since the antenna body is not disposed on the substrate, the surface area of the substrate can be reduced to meet the miniaturization requirement of the electronic package.Type: ApplicationFiled: January 2, 2014Publication date: May 28, 2015Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTDInventors: Hsin-Lung Chung, Hao-Ju Fang, Chih-Hsien Chiu, Yude Chu, Tsung-Hsien Tsai
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Publication number: 20150028081Abstract: A method for fabricating a wire bonding structure is disclosed, which includes: providing a substrate having a plurality of bonding pads; and foaming a ball end of a bonding wire on at least one of the bonding pads by performing a scrubbing process along a path around a periphery of the bonding pad, thereby preventing delamination of the ball end of small size from the bonding pad.Type: ApplicationFiled: November 21, 2013Publication date: January 29, 2015Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTDInventors: Wei-Sheng Lin, Lung-Tang Hung, Meng-Hung Yeh, Zhi-Lun Hsieh, Yude Chu
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Publication number: 20140353850Abstract: A semiconductor package is disclosed, which includes: a circuit board; a carrier disposed on the circuit board; an RF chip disposed on the carrier; a plurality of high level bonding wires electrically connecting electrode pads of the RF chip and the circuit board; and an encapsulant formed on the circuit board for encapsulating the carrier, the high level bonding wires and the RF chip. The present invention positions the RF chip at a high level so as to facilitate element arrangement and high frequency wiring on the circuit board, thereby achieving a highly integrated wireless SiP (System in Package) module.Type: ApplicationFiled: August 20, 2013Publication date: December 4, 2014Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chih-Hsien Chiu, Tsung-Hsien Tsai, Chao-Ya Yang, Chia-Yang Chen, Chih-Ming Cheng, Yude Chu
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Publication number: 20140210672Abstract: An electronic package structure is provided, including a substrate, a package encapsulant disposed on the substrate, and an antenna structure corresponding to a disposing area of the package encapsulant and having a first extension layer, a second extension layer disposed on the substrate, and a connection portion disposed between and electrically connected to the first extension layer and the second extension layer. Through the formation of the antenna structure on the disposing area of the package encapsulant, the substrate is not required to be widen, and, as such, the electronic package structure meets the miniaturization requirement.Type: ApplicationFiled: December 16, 2013Publication date: July 31, 2014Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTDInventors: Chih-Hsien Chiu, Heng-Cheng Chu, Chien-Cheng Lin, Tsung-Hsien Tsai, Chao-Ya Yang, Yude Chu
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Publication number: 20140203395Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.Type: ApplicationFiled: November 22, 2013Publication date: July 24, 2014Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTDInventors: Tsung-Hsien Tsai, Heng-Cheng Chu, Chien-Cheng Lin, Chih-Hsien Chiu, Hsin-Lung Chung, Yude Chu
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Patent number: 6781222Abstract: A semiconductor package and its fabricating method are proposed, in which a plurality of passive devices are integrated under a semiconductor chip, so as to increase the layout number of the passive devices in the semiconductor package and enhance the flexibility of substrate routability, as well as reduce an occupied area of a substrate for miniaturize the semiconductor package in profile. Moreover, as the integrated passive devices are further encapsulated by using an insulative material prior to a molding process, the dislocation of the passive devices caused by a high temperature and mold flow of a molding resin can be prevented from occurrence during molding. Furthermore, the encapsulated passive devices are prevented from contacting bonding wires, allowing the occurrence of short circuit to be avoided and quality of the packaged product to be assured.Type: GrantFiled: August 18, 2001Date of Patent: August 24, 2004Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chi Chuan Wu, Chian Ping Huang, Jui-Yu Chuang, Ho-Yi Tsai, Yude Chu
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Publication number: 20020086500Abstract: A semiconductor package and its fabricating method are proposed, in which a plurality of passive devices are integrated under a semiconductor chip, so as to increase the layout number of the passive devices in the semiconductor package and enhance the flexibility of substrate routability, as well as reduce an occupied area of a substrate for miniaturize the semiconductor package in profile. Moreover, as the integrated passive devices are further encapsulated by using an insulative material prior to a molding process, the dislocation of the passive devices caused by a high temperature and mold flow of a molding resin can be prevented from occurrence during molding. Furthermore, the encapsulated passive devices are prevented from contacting bonding wires, allowing the occurrence of short circuit to be avoided and quality of the packaged product to be assured.Type: ApplicationFiled: August 18, 2001Publication date: July 4, 2002Applicant: Siliconware Precision Industries, Co., Ltd.Inventors: Chi Chuan Wu, Chian Ping Huang, Jui-Yu Chuang, Ho-Yi Tsai, Yude Chu