Patents by Inventor Yudong Kim

Yudong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10629652
    Abstract: Embodiments of the present disclosure describe techniques and configurations for a memory device comprising a memory array having a plurality of wordlines disposed in a memory region of a die. Fill regions may be disposed between respective pairs of adjacent wordlines of the plurality of wordlines. The fill regions may include a first dielectric layer and a second dielectric layer disposed on the first dielectric layer. The first dielectric layer may comprise organic (e.g., carbon-based) spin-on dielectric material (CSOD). The second dielectric layer may comprise a different dielectric material than the first dielectric layer, such as, for example, inorganic dielectric material. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: April 21, 2020
    Assignee: Intel Corporation
    Inventors: Michael J. Bernhardt, Yudong Kim, Denzil S. Frost, Tuman Earl Allen, III, Kevin Lee Baker, Kolya Yastrebenetsky, Ronald Allen Weimer
  • Patent number: 10522757
    Abstract: In various examples, dual resistive-material regions for a phase change material region are fabricated by initially forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, in certain embodiments, the portion of the resistive material proximate to the phase change material region may be used as a heater because of a relatively, high resistance value of the resistive material, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: December 31, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Yudong Kim, Ilya V Karpov, Charles C. Kuo, Maria Santina Marangon, Tyler A. Lowrey, Greg Atwood
  • Patent number: 10522756
    Abstract: In various examples, a dual resistance heater for a phase change material region is fabricated by forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, the portion of the resistive material proximate to the phase change material region forms a heater because of its high resistance value, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.
    Type: Grant
    Filed: February 6, 2015
    Date of Patent: December 31, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Yudong Kim, Ilya V Karpov, Charles C. Kuo, Maria Santina Marangon, Tyler A. Lowrey, Greg Atwood
  • Publication number: 20190206942
    Abstract: Embodiments of the present disclosure describe techniques and configurations for a memory device comprising a memory array having a plurality of wordlines disposed in a memory region of a die. Fill regions may be disposed between respective pairs of adjacent wordlines of the plurality of wordlines. The fill regions may include a first dielectric layer and a second dielectric layer disposed on the first dielectric layer. The first dielectric layer may comprise organic (e.g., carbon-based) spin-on dielectric material (CSOD). The second dielectric layer may comprise a different dielectric material than the first dielectric layer, such as, for example, inorganic dielectric material. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: November 15, 2018
    Publication date: July 4, 2019
    Inventors: Michael J. Bernhardt, Yudong Kim, Denzil S. Frost, Tuman Earl Allen, III, Kevin Lee Baker, Kolya Yastrebenetsky, Ronald Allen Weimer
  • Patent number: 10134809
    Abstract: Embodiments of the present disclosure describe techniques and configurations for a memory device comprising a memory array having a plurality of wordlines disposed in a memory region of a die. Fill regions may be disposed between respective pairs of adjacent wordlines of the plurality of wordlines. The fill regions may include a first dielectric layer and a second dielectric layer disposed on the first dielectric layer. The first dielectric layer may comprise organic (e.g., carbon-based) spin-on dielectric material (CSOD). The second dielectric layer may comprise a different dielectric material than the first dielectric layer, such as, for example, inorganic dielectric material. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: November 20, 2018
    Assignee: INTEL CORPORATION
    Inventors: Michael J. Bernhardt, Yudong Kim, Denzil S. Frost, Tuman Earl Allen, Kevin Lee Baker, Kolya Yastrebenetsky, Ronald Allen Weimer
  • Patent number: 10048539
    Abstract: Provided is a method of manufacturing a backlight unit of a curved display device. The method includes providing a bottom chassis having a predetermined curvature radius, manufacturing a reflection member, and disposing the reflection member on the bottom chassis.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: August 14, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kangwoo Lee, Yudong Kim
  • Publication number: 20180138406
    Abstract: In various examples, dual resistive-material regions for a phase change material region are fabricated by initially forming a resistive material. Prior to forming the phase change material region over the resistive material, at least an upper portion of the resistive material is exposed to an implantation or plasma that increases the resistance of an upper portion of the resistive material relative to the remainder, or bulk, of the resistive material. As a result, in certain embodiments, the portion of the resistive material proximate to the phase change material region may be used as a heater because of a relatively, high resistance value of the resistive material, but the bulk of the resistive material has a relatively lower resistance value and, thus, does not increase the voltage drop and current usage of the device. Other methods and devices are disclosed.
    Type: Application
    Filed: December 21, 2017
    Publication date: May 17, 2018
    Inventors: Yudong Kim, Ilya V. Karpov, Charles C. Kuo, Maria Santina Marangon, Tyler A. Lowrey, Greg Atwood
  • Publication number: 20170271412
    Abstract: Embodiments of the present disclosure describe techniques and configurations for a memory device comprising a memory array having a plurality of wordlines disposed in a memory region of a die. Fill regions may be disposed between respective pairs of adjacent wordlines of the plurality of wordlines. The fill regions may include a first dielectric layer and a second dielectric layer disposed on the first dielectric layer. The first dielectric layer may comprise organic (e.g., carbon-based) spin-on dielectric material (CSOD). The second dielectric layer may comprise a different dielectric material than the first dielectric layer, such as, for example, inorganic dielectric material. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: June 2, 2017
    Publication date: September 21, 2017
    Inventors: Michael J. Bernhardt, Yudong Kim, Denzil S. Frost, Tuman Earl Allen, III, Kevin Lee Baker, Kolya Yastrebenetsky, Ronald Allen Weimer
  • Patent number: 9704923
    Abstract: Embodiments of the present disclosure describe techniques and configurations for a memory device comprising a memory array having a plurality of wordlines disposed in a memory region of a die. Fill regions may be disposed between respective pairs of adjacent wordlines of the plurality of wordlines. The fill regions may include a first dielectric layer and a second dielectric layer disposed on the first dielectric layer. The first dielectric layer may comprise organic (e.g., carbon-based) spin-on dielectric material (CSOD). The second dielectric layer may comprise a different dielectric material than the first dielectric layer, such as, for example, inorganic dielectric material. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: July 11, 2017
    Assignee: Intel Corporation
    Inventors: Michael J. Bernhardt, Yudong Kim, Denzil S. Frost, Tuman Earl Allen, III, Kevin Lee Baker, Kolya Yastrebenetsky, Ronald Allen Weimer
  • Publication number: 20170186815
    Abstract: Embodiments of the present disclosure describe techniques and configurations for a memory device comprising a memory array having a plurality of wordlines disposed in a memory region of a die. Fill regions may be disposed between respective pairs of adjacent wordlines of the plurality of wordlines. The fill regions may include a first dielectric layer and a second dielectric layer disposed on the first dielectric layer. The first dielectric layer may comprise organic (e.g., carbon-based) spin-on dielectric material (CSOD). The second dielectric layer may comprise a different dielectric material than the first dielectric layer, such as, for example, inorganic dielectric material. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 23, 2015
    Publication date: June 29, 2017
    Inventors: Michael J. Bernhardt, Yudong Kim, Denzil S. Frost, Tuman Earl Allen, III, Kevin Lee Baker, Kolya Yastrebenetsky, Ronald Allen Weimer
  • Publication number: 20160207065
    Abstract: Provided is a method of manufacturing a backlight unit of a curved display device. The method includes providing a bottom chassis having a predetermined curvature radius, manufacturing a reflection member, and disposing the reflection member on the bottom chassis.
    Type: Application
    Filed: November 17, 2015
    Publication date: July 21, 2016
    Inventors: Kangwoo Lee, Yudong Kim
  • Patent number: 9203024
    Abstract: A phase change memory cell may include two or more stacked or unstacked series connected memory elements. The cell has a higher, adjustable threshold voltage. A copper diffusion plug may be provided within a pore over a copper line. By positioning the plug below the subsequent chalcogenide layer, the plug may be effective to block copper diffusion upwardly into the pore and into the chalcogenide material. Such diffusion may adversely affect the electrical characteristics of the chalcogenide layer.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: December 1, 2015
    Assignee: Intel Corporation
    Inventors: Yudong Kim, Charles C. Kuo, Gianpaolo Spadini
  • Patent number: 9159915
    Abstract: An ovonic threshold switch may be formed of a continuous chalcogenide layer. That layer spans multiple cells, forming a phase change memory. In other words, the ovonic threshold switch may be formed of a chalcogenide layer which extends, uninterrupted, over numerous cells of a phase change memory.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: October 13, 2015
    Assignee: Ovonyx, Inc.
    Inventors: Ilya V. Karpov, Sean Jong Lee, Yudong Kim, Greg Atwood
  • Publication number: 20150188050
    Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.
    Type: Application
    Filed: February 6, 2015
    Publication date: July 2, 2015
    Inventors: Yudong Kim, Ilya V. Karpov, Charles C. Kuo, Maria Santina Marangon, Tyler A. Lowrey, Greg Atwood
  • Patent number: 8952299
    Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: February 10, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Yudong Kim, Ilya V Karpov, Charles C. Kuo, Greg Atwood, Maria Santina Marangon, Tyler A. Lowrey
  • Publication number: 20140104939
    Abstract: An ovonic threshold switch may be formed of a continuous chalcogenide layer. That layer spans multiple cells, forming a phase change memory. In other words, the ovonic threshold switch may be formed of a chalcogenide layer which extends, uninterrupted, over numerous cells of a phase change memory.
    Type: Application
    Filed: December 18, 2013
    Publication date: April 17, 2014
    Applicant: Ovonyx, Inc.
    Inventors: Ilya V. Karpov, Sean Jong Lee, Yudong Kim, Greg Atwood
  • Publication number: 20140038379
    Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.
    Type: Application
    Filed: August 19, 2013
    Publication date: February 6, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Yudong Kim, Ilya V. Karpov, Charles C. Kuo, Greg Atwood, Maria Santina Marangon, Tyler A. Lowrey
  • Patent number: 8637342
    Abstract: An ovonic threshold switch may be formed of a continuous chalcogenide layer. That layer spans multiple cells, forming a phase change memory. In other words, the ovonic threshold switch may be formed of a chalcogenide layer which extends, uninterrupted, over numerous cells of a phase change memory.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: January 28, 2014
    Assignee: Ovonyx, Inc.
    Inventors: Ilya V. Karpov, Sean Jong Lee, Yudong Kim, Gregory E. Atwood
  • Patent number: 8536013
    Abstract: Small phase change memory cells may be formed by forming a segmented heater over a substrate. A stop layer may be formed over the heater layer and segmented with the heater layer. Then, sidewall spacers may be formed over the segmented heater to define an aperture between the sidewall spacers that may act as a mask for etching the stop layer over the segmented heater. As a result of the etching using the sidewall spacers as a mask, sublithographic pore may be formed over the heater. Phase change material may be formed within the pore.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: September 17, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Yudong Kim, Fabio Pellizzer
  • Patent number: 8513576
    Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.
    Type: Grant
    Filed: December 28, 2010
    Date of Patent: August 20, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Yudong Kim, Ilya V. Karpov, Charles C. Kuo, Greg Atwood, Maria Santina Marangon, Tyler Lowrey