Abstract: A detector compares a first bit of a bit stream to a first bit of a pattern. If the first bit of the bit stream and the first bit of the pattern are the same, another detector is allowed to read a second bit of the bit stream and compare it to a second bit of the pattern. This continues until all bits of the pattern are detected. By performing the comparison as each bit of the bit stream arrives on a node, the present detectors are able to detect bit patterns in high-speed bit streams.

Abstract: A precise TLB error detection and shutdown circuit that detects for two or more matching tag entries in a TLB by providing an array of n units of error detection circuit unit <i>, wherein each error detection unit <i> comprises a first input B<i> coupled to an associated bit <i> of an input n-bit tag compare indicator. A second input A<i> is coupled to an output bit of an immediately preceding error detection unit <i-1>. A third input C<i> is coupled to a output bit of a immediately preceding error detection unit <i-1>. Each error detection unit <i> generates a first output bit X<i>, the output indicator X<i> indicating a result of detecting two or more matching tag entries, and a second output indicator Y<i>, the output indicator Y<i> indicating a result of detecting one or more matching tag entries.