Abstract: Systems and methods are described here to compensate for crosstalk (e.g., coupling distortions) that may be caused by a fanout overlaid or otherwise affecting signals transmitted within an active area of an electronic display. The systems and methods may be based on buffered previous image data. Technical effects associated with compensating for the crosstalk may include improved display of image frames since some image artifacts are mitigated and/or made unperceivable or eliminated.

Abstract: Systems and methods are described here to compensate for crosstalk (e.g., coupling distortions) that may be caused by a fanout overlaid or otherwise affecting signals transmitted within an active area of an electronic display. The systems and methods may be based on buffered previous image data. Technical effects associated with compensating for the crosstalk may include improved display of image frames since some image artifacts are mitigated and/or made unperceivable or eliminated.

Abstract: To reduce overall power consumption for an electronic display power management integrated circuit (PMIC), one of multiple electric power converters and/or electric power regulators may be selected based on an electrical load (e.g., due to the total brightness of the content displayed) on the electronic display at a given moment. In some embodiments, the PMIC may include a less efficient heavy load converter designed with high-current handling capability and a more efficient light load (e.g., low current) converter with lower current handling capability. A controller may dynamically select between the converters depending on a present load or an expected load on the electronic display.

Abstract: Systems, methods, and devices are provided for mitigating visual artifacts by dynamically tuning bias voltages applied to display pixels. An electronic display may include a display pixel and a bias voltage supply. The bias voltage supply may supply a first bias voltage to the display pixel for a first subframe of a frame of image data. The bias voltage supply may supply a different second bias voltage to the display pixel for a second subframe of the frame of image data. This may mitigate certain image artifacts, such as flicker or variable refresh rate luminance difference, that could arise due to display pixel hysteresis that varies across subframes of the image frame.

Abstract: Techniques for implementing and/or operating an electronic device including a display pixel layer, which writes a display image during an active period and continues displaying the display image during a blanking period, and a touch sense layer, which generates a first touch image during the active period and a second touch image during the blanking period. The electronic device further includes a controller that determines a first noise metric indicative of display-to-touch noise resulting during the active period based on the first touch image, determines a second noise metric indicative of display-to-touch noise resulting during the blanking period based on the second touch image, and instructs the touch sense layer to not generate a third touch image during a subsequent active period in response to the first noise metric being greater than a noise threshold and the second noise metric not being greater than the noise threshold.

Abstract: This disclosure provide various techniques for tracking emission profiles on an electronic display. An emission profile may be applied to the electronic display in order to illuminate certain pixels and deactivate (e.g., turn off) certain pixels in the electronic display to facilitate refreshing (e.g., programming with new image data) the deactivated pixels. A real-time row-based average pixel level or average pixel luminance calculation architecture may track the one or more EM profiles to accurately model EM profile behavior, which may enable accurate calculation of the average pixel level or average pixel luminance of the electronic display at any one point in time. The accurate average pixel level or average pixel luminance calculations effectuated by the EM profile tracking may be used to reduce the IR drop, improve real-time peak-luminance control, and improve the performance of under-display sensors, among other advantages.

Abstract: A display device may include rows of pixels that display image data on a display and a circuit. The circuit may receive pixel data value of image data for a pixel in a first row of the rows of pixels, determine a weight factor to apply to the pixel data value based on a position of the first row with respect to the other rows, such that each row is associated with a current-resistance (IR) drop across the display. The weight factor is determined based on a respective IR drop associated with the first row. The circuit may also generate a weighted pixel data value based on the weight factor and the pixel data value and send the weighted pixel data value to a display driver circuit that renders the image data via the display.

Abstract: Systems, methods, and devices are provided for mitigating visual artifacts by dynamically tuning bias voltages applied to display pixels. An electronic display may include a display pixel and a bias voltage supply. The bias voltage supply may supply a first bias voltage to the display pixel for a first subframe of a frame of image data. The bias voltage supply may supply a different second bias voltage to the display pixel for a second subframe of the frame of image data. This may mitigate certain image artifacts, such as flicker or variable refresh rate luminance difference, that could arise due to display pixel hysteresis that varies across subframes of the image frame.

Abstract: A system may include an electronic display panel having pixels, where each pixel may emit light based on a respective programming signal. The system may include a memory storing a map. The processing circuitry may determine a function for each pixel from the map. The processing circuitry may determine a respective control signal based on the function and a target brightness level for each pixel to generate multiple control signals, where the respective control signal is used to generate the respective programing signal for each pixel. The processing circuitry may determine a scaling factor based at least in part on the first map and may scale at least a subset of the multiple control signals based at least in part on the scaling factor.

Abstract: A display may have an array of organic light-emitting diode display pixels. Each display pixel may include a drive transistor coupled in series with one or more emission transistors and a respective organic light-emitting diode (OLED). A semiconducting-oxide transistor may be coupled between a drain terminal and a gate terminal of the drive transistor to help reduce leakage during low-refresh-rate display operations. To compensate for variations in the threshold voltage of the semiconducting-oxide transistor, the magnitude of a high voltage level of a scan control signal provided to the gate terminal of the semiconducting-oxide transistor may be adjusted. Sensing circuitry may be used to sense a display current while displaying a calibration image. The sensed display current may be compared to an expected display current associated with the calibration image. Processing circuitry may update the high voltage level based on the actual display current compared to the expected display current.

Abstract: A display driver is disclosed that reduces first frame dimming and flicker in light-emitting diode pixels of a display device. The display driver may receive a display brightness value and determine a value of a dynamic supply voltage parameter based on the display brightness value. Over a first time interval, the display driver may apply a supply voltage that is based on the dynamic supply voltage parameter to one of a gate of a drive transistor of a light-emitting-diode circuit and a channel of the drive transistor. Over a second time interval, the display driver may apply a parking voltage to an anode of a light-emitting diode of the light-emitting-diode circuit and to the channel of the drive transistor. The value of the parking voltage may be below a threshold voltage of the light-emitting diode and correspond to the value of the dynamic supply voltage parameter.

Abstract: A display driver is disclosed that reduces first frame dimming and flicker in light-emitting diode pixels of a display device. The display driver may receive a display brightness value and determine a value of a dynamic supply voltage parameter based on the display brightness value. Over a first time interval, the display driver may apply a supply voltage that is based on the dynamic supply voltage parameter to one of a gate of a drive transistor of a light-emitting-diode circuit and a channel of the drive transistor. Over a second time interval, the display driver may apply a parking voltage to an anode of a light-emitting diode of the light-emitting-diode circuit and to the channel of the drive transistor. The value of the parking voltage may be below a threshold voltage of the light-emitting diode and correspond to the value of the dynamic supply voltage parameter.

Abstract: In situations with reduced image changes, display panels, such as the ones disclosed herein, may reduce their power consumption by performing self-refresh cycles, in which they may display locally stored data in the display panel instead of retrieving it from an image buffer. Methods and circuitry for management of the self-refresh cycle may reduce jitter, luminance errors, and/or flickers that may be caused by untimely self-refresh cycles that may occur as a result of latency in the image buffer. In some implementations, the display panel may have a dedicated low latency input that notifies an arrival of an incoming image. In some implementations, the self-refresh cycles of the panel may be managed by a host or a buffer that is responsible for sending the images.

Abstract: A display may have an array of organic light-emitting diode display pixels. Each display pixel may include a drive transistor coupled in series with one or more emission transistors and a respective organic light-emitting diode (OLED). A semiconducting-oxide transistor may be coupled between a drain terminal and a gate terminal of the drive transistor to help reduce leakage during low-refresh-rate display operations. To compensate for variations in the threshold voltage of the semiconducting-oxide transistor, the magnitude of a high voltage level of a scan control signal provided to the gate terminal of the semiconducting-oxide transistor may be adjusted. Sensing circuitry may be used to sense a display current while displaying a calibration image. The sensed display current may be compared to an expected display current associated with the calibration image. Processing circuitry may update the high voltage level based on the actual display current compared to the expected display current.

Abstract: A display device may include rows of pixels that display image data on a display and a circuit. The circuit may receive pixel data value of image data for a pixel in a first row of the rows of pixels, determine a weight factor to apply to the pixel data value based on a position of the first row with respect to the other rows, such that each row is associated with a current-resistance (IR) drop across the display. The weight factor is determined based on a respective IR drop associated with the first row. The circuit may also generate a weighted pixel data value based on the weight factor and the pixel data value and send the weighted pixel data value to a display driver circuit that renders the image data via the display.

Abstract: Display artifacts, such as muras, may be perceptible on an electronic display when an electronic device includes a radio frequency transceiver that outputs electromagnetic waves during an emission period and a display panel that writes to display pixels during a refresh period. The electronic device may also include a controller that is coupled to the radio frequency transceiver and the display panel and facilitates the reduction and/or elimination of overlap between the emission periods and the refresh periods to decrease the appearance of display artifacts. In particular, the controller may execute instructions to determine the duration of the emission period and determine the duration of the blanking period that occurs between the refresh periods.

Abstract: A display may have an array of pixels. Due to the presence of a notch in the display, the display may have some rows that are shorter than other rows in the display, and accordingly different gate line loading. To account for the gate line loading variations, the display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. In other arrangement, luminance adjustment circuitry may receive image data and generate corresponding compensated image data to account for gate line loading variations between rows of pixels in the display. The image data may be compensated based on the location of the pixel, the gray level of the image data, the display brightness, and/or temperature.

Abstract: Display-to-touch noise may be perceptible when a touch image generated during an active period of an electronic display of an electronic device is used to determine a touch indication on the display. The electronic device may include a display pixel layer including a plurality of display pixels that write display images to the display during a display active period and continue displaying the display image during a display blanking period. The electronic device may also include a touch sense layer including a plurality of touch sense pixels that facilitate generation of a first touch image during a first display active period and generation of a second touch image during a first display blanking period. The electronic device may further include a controller coupled to the display pixel layer and the touch sense layer that facilitates the reduction or elimination of display-to-touch interference.

Abstract: Display artifacts, such as muras, may be perceptible on an electronic display when an electronic device includes a radio frequency transceiver that outputs electromagnetic waves during an emission period and a display panel that writes to display pixels during a refresh period. The electronic device may also include a controller that is coupled to the radio frequency transceiver and the display panel and facilitates the reduction and/or elimination of overlap between the emission periods and the refresh periods to decrease the appearance of display artifacts. In particular, the controller may execute instructions to determine the duration of the emission period and determine the duration of the blanking period that occurs between the refresh periods.

Abstract: In situations with reduced image changes, display panels, such as the ones disclosed herein, may reduce their power consumption by performing self-refresh cycles, in which they may display locally stored data in the display panel instead of retrieving it from an image buffer. Methods and circuitry for management of the self-refresh cycle may reduce jitter, luminance errors, and/or flickers that may be caused by untimely self-refresh cycles that may occur as a result of latency in the image buffer. In some implementations, the display panel may have a dedicated low latency input that notifies an arrival of an incoming image. In some implementations, the self-refresh cycles of the panel may be managed by a host or a buffer that is responsible for sending the images.