Abstract: Various embodiments provide a single pole single throw switch. The switch may include a first terminal, a second terminal and a control terminal; a field-effect transistor having a drain connected to the first terminal, a source connected to the ground, and a gate; a bias resistor connected between the gate of the field-effect transistor and the control terminal; an inductor connected between the first terminal and the second terminal; and a capacitor having one end connected to the second terminal and another end connected to the ground.

Abstract: A switch for controlling signal propagation between a first and second contact is proposed. This switch comprises a control mechanism configured to allow signal propagation between the first and second contacts when the switch is turned on and prevent signal propagation between the first and second contacts when the switch is turned off. The switch also comprises a compensating member having a transmission line and a ground plane. The ground plane in turn comprises at least one defect configured to affect one or both of the inductance and capacitance of the transmission line when signals propagate through the transmission line.

Abstract: Various embodiments provide a single pole single throw switch. The switch may include a first terminal, a second terminal and a control terminal; a field-effect transistor having a drain connected to the first terminal, a source connected to the ground, and a gate; a bias resistor connected between the gate of the field-effect transistor and the control terminal; an inductor connected between the first terminal and the second terminal; and a capacitor having one end connected to the second terminal and another end connected to the ground.

Abstract: A grid array antenna configured to operate with millimeter wavelength signals, the grid array antenna comprising a plurality of mesh elements and at least one radiation element; each mesh element comprising at least one long side and at least one short side operatively connected to the at least one long side; at least one of: the at least one radiating element, the at least one short side, and the at least one long side having compensation for improved antenna output for improved antenna radiation.

Abstract: A transistor arrangement including a triple well structure, the triple well structure including a substrate of a first conductivity type, a first well region of a second conductivity type formed within the substrate and a second well region of the first conductivity type being separated from the substrate by the first well region. The transistor arrangement further includes a first transistor formed on or in the second well region, the first transistor including a body terminal being connected to the second well region and a second well region switch being connected to the body terminal of the first transistor.

Abstract: An integrated circuit structure is disclosed. The integrated circuit structure includes a first package substrate including a radiating element, the radiating element having a radiating element connection extending from the radiating element. The integrated circuit structure further includes a first chip positioned adjacent to the radiating element connection, the first chip having a first chip connection on a surface of the first chip, wherein the first chip connection forms a capacitive coupling with the radiating element connection. A method of forming an integrated circuit structure is also disclosed.

Abstract: A grid array antenna configured to operate with millimetre wavelength signals, the grid array antenna comprising a plurality of mesh elements and at least one radiation element; each mesh element comprising at least one long side and at least one short side operatively connected to the at least one long side; at least one of: the at least one radiating element, the at least one short side, and the at least one long side having compensation for improved antenna output for improved antenna radiation.

Abstract: An antenna on a substrate, the antenna being symmetrical about a central longitudinal axis of symmetry, the antenna comprising a first portion that is substantially rectangular, a second portion that is substantially rectangular, the first portion and the second portion being spaced from each other and being operatively connected by an intermediate portion.

Abstract: A low noise amplifier circuit including a front end voltage sensing and matching amplification circuit, a gain circuit and a combining circuit is disclosed. The front end voltage sensing and matching amplification circuit includes an input and two outputs and provides a matched signal at each output. The gain circuit includes two inputs, each input being respectively coupled to at least one of the two outputs of the front end voltage sensing and matching amplification circuit. The gain circuit further includes two outputs and an output signal is provided at each output of the gain circuit. The combining circuit combines the two output signals of the gain circuit. The combining circuit includes two inputs, each input is respectively coupled to at least one of the two outputs of the gain circuit. The combining circuit further includes an output providing a combined signal.

Abstract: A low noise amplifier circuit including a front end voltage sensing and matching amplification circuit, a gain circuit and a combining circuit is disclosed. The front end voltage sensing and matching amplification circuit includes an input and two outputs and provides a matched signal at each output. The gain circuit includes two inputs, each input being respectively coupled to at least one of the two outputs of the front end voltage sensing and matching amplification circuit. The gain circuit further includes two outputs and an output signal is provided at each output of the gain circuit. The combining circuit combines the two output signals of the gain circuit. The combining circuit includes two inputs, each input is respectively coupled to at least one of the two outputs of the gain circuit. The combining circuit further includes an output providing a combined signal.

Abstract: An integrated circuit structure is disclosed. The integrated circuit structure includes a first package substrate including a radiating element, the radiating element having a radiating element connection extending from the radiating element. The integrated circuit structure further includes a first chip positioned adjacent to the radiating element connection, the first chip having a first chip connection on a surface of the first chip, wherein the first chip connection forms a capacitive coupling with the radiating element connection. A method of forming an integrated circuit structure is also disclosed.

Abstract: A transistor arrangement including a triple well structure, the triple well structure including a substrate of a first conductivity type, a first well region of a second conductivity type formed within the substrate and a second well region of the first conductivity type being separated from the substrate by the first well region. The transistor arrangement further includes a first transistor formed on or in the second well region, the first transistor including a body terminal being connected to the second well region and a second well region switch being connected to the body terminal of the first transistor.

Abstract: A chip arrangement is disclosed. The chip arrangement includes a first chip, a first bond wire having an inductive element and coupled with the first chip at its one end and an inductivity compensation structure including a first conductive plate coupled with the first bond wire at the other end of the first bond wire, and a second conductive plate arranged in parallel to the first conductive plate, wherein the first conductive plate and the second conductive plate are configured such that a resonant condition for a partial circuit formed by the first bond wire and the inductivity compensation structure is formed to compensate for the inductive element of the first bond wire. A method of determining an inductivity compensation structure for compensating a bond wire inductivity in a chip arrangement is also disclosed.

Abstract: A device package for radio frequency transceivers that comprises radio electronics, a filter and an antenna. The filter and antenna are realized using one or more metallization layers in the housing of the device package. The filter and antenna in the housing of the device package allows the realization of a compact RF transceiver with a small form-factor.

Abstract: An antenna on a substrate, the antenna being symmetrical about a central longitudinal axis of symmetry, the antenna comprising a first portion that is substantially rectangular, a second portion that is substantially rectangular, the first portion and the second portion being spaced from each other and being operatively connected by an intermediate portion.

Abstract: A method and implementation for communicating between logic functions using non-metallic coupling between logic functions on a same chip or separate chip is shown. For communication on the same chip, radiated energy from an antenna coupled to a transmitting logic function is coupled to a receiving antenna and then coupled by an electrical connection to a receiving logic function. Communication between USLI chips mounted on a module is performed by coupling an RF signal from a first chip to a ?-satellite mounted within the module and then coupling the RF signal from the satellite to a second chip. Communication can also be formed between the satellite and different logical functions on the same USLI chip.