Abstract: An electronic package is provided, which includes: a carrier; a plurality of electronic elements disposed on the carrier; a bather frame disposed on the carrier and positioned between adjacent two of the electronic elements; an encapsulant formed on the carrier and encapsulating the electronic elements and the bather frame with a portion of the bather frame protruding from the encapsulant; and a shielding element disposed on the encapsulant and being in contact with the portion of the bather frame protruding from the encapsulant. Therefore, the electronic package has an electromagnetic interference (EMI) shielding effect improved. The present disclosure further provides a method for fabricating the electronic package.

Abstract: An electronic package is provided, which includes: a carrier; a plurality of electronic elements disposed on the carrier; a bather frame disposed on the carrier and positioned between adjacent two of the electronic elements; an encapsulant formed on the carrier and encapsulating the electronic elements and the bather frame with a portion of the bather frame protruding from the encapsulant; and a shielding element disposed on the encapsulant and being in contact with the portion of the bather frame protruding from the encapsulant. Therefore, the electronic package has an electromagnetic interference (EMI) shielding effect improved. The present disclosure further provides a method for fabricating the electronic package.

Abstract: An electronic package is provided, which includes: a carrier; a plurality of electronic elements disposed on the carrier; a barrier frame disposed on the carrier and positioned between adjacent two of the electronic elements; an encapsulant formed on the carrier and encapsulating the electronic elements and the barrier frame with a portion of the barrier frame protruding from the encapsulant; and a shielding element disposed on the encapsulant and being in contact with the portion of the barrier frame protruding from the encapsulant. Therefore, the electronic package has an electromagnetic interference (EMI) shielding effect improved. The present disclosure further provides a method for fabricating the electronic package.

Abstract: An electronic package is provided, which includes: a carrier; a plurality of electronic elements disposed on the carrier; a barrier frame disposed on the carrier and positioned between adjacent two of the electronic elements; an encapsulant formed on the carrier and encapsulating the electronic elements and the barrier frame with a portion of the barrier frame protruding from the encapsulant; and a shielding element disposed on the encapsulant and being in contact with the portion of the barrier frame protruding from the encapsulant. Therefore, the electronic package has an electromagnetic interference (EMI) shielding effect improved. The present disclosure further provides a method for fabricating the electronic package.

Abstract: A process including providing a semiconductor device including a bond pad, and an under bump metallurgy overlying the bond pad. Forming a solder structure over the under bump metallurgy, and wherein the solder structure includes an outer layer including tin oxide. Producing a plasma from at least one of CF4 and SF6, and exposing the solder structure to the plasma. Heating the solder structure and cooling the same to provide a solder bump on the semiconductor device.

Abstract: A process including providing a semiconductor device including a bond pad, and an under bump metallurgy overlying the bond pad. Forming a solder structure over the under bump metallurgy, and wherein the solder structure includes an outer layer including tin oxide. Producing a plasma from at least one of CF4 and SF6, and exposing the solder structure to the plasma. Heating the solder structure and cooling the same to provide a solder bump on the semiconductor device.

Abstract: A process including providing a semiconductor device including a bond pad, and an under bump metallurgy overlying the bond pad. Forming a solder structure over the under bump metallurgy, and wherein the solder structure includes an outer layer including tin oxide. Producing a plasma from at least one of CF4 and SF6, and exposing the solder structure to the plasma. Heating the solder structure and cooling the same to provide a solder bump on the semiconductor device.

Abstract: An apparatus for shear testing bonds on 8? and 12? silicon substrates. The apparatus includes a removable platform for securing the 8? wafer and a vacuum chuck for securing a 12? wafer and the removable platform at the same time. A control module controls a moving mechanism to shift a probe to contact the solder ball of the 12? substrate secured on the vacuum chuck or the solder ball of the 8? wafer on the removable platform when the removable platform is fixed on the vacuum chuck. The moving mechanism moves the probe in a direction to separate the solder ball from the wafer. A sensor measures the pulling force exerted on the probe when the probe is moved in a direction and separates the solder ball from the wafer.

Abstract: An apparatus for shear testing bonds on 8? and 12? silicon substrates. The apparatus includes a removable platform for securing the 8? wafer and a vacuum chuck for securing a 12? wafer and the removable platform at the same time. A control module controls a moving mechanism to shift a probe to contact the solder ball of the 12? substrate secured on the vacuum chuck or the solder ball of the 8? wafer on the removable platform when the removable platform is fixed on the vacuum chuck. The moving mechanism moves the probe in a direction to separate the solder ball from the wafer. A sensor measures the pulling force exerted on the probe when the probe is moved in a direction and separates the solder ball from the wafer.

Abstract: A process including providing a semiconductor device including a bond pad, and an under bump metallurgy overlying the bond pad. Forming a solder structure over the under bump metallurgy, and wherein the solder structure includes an outer layer including tin oxide. Producing a plasma from at least one of CF4 and SF6, and exposing the solder structure to the plasma. Heating the solder structure and cooling the same to provide a solder bump on the semiconductor device.