Abstract: Provided are a display device and an array substrate thereof. The array substrate includes a plurality of pixel units arranged in an array, wherein each of the pixel units comprises a light shielding layer, a thin film transistor, a touch electrode, a scan line and a data line, and the scan line is disposed in a first direction, and the data line is disposed in a second direction, and the scan line crosses the data line, and the pixel unit further comprises a touch signal line, and the touch signal line is at a same layer as the scan line, and two adjacent touch signal lines in the first direction are connected with the light shielding layer, the touch signal line is connected to the light shielding layer through a first via hole, and the touch signal line is connected to the touch electrode through a second via hole.

Abstract: Provided are a display device and an array substrate thereof. The array substrate includes a plurality of pixel units arranged in an array, wherein each of the pixel units comprises a light shielding layer, a thin film transistor, a touch electrode, a scan line and a data line, and the scan line is disposed in a first direction, and the data line is disposed in a second direction, and the scan line crosses the data line, and the pixel unit further comprises a touch signal line, and the touch signal line is at a same layer as the scan line, and two adjacent touch signal lines in the first direction are connected with the light shielding layer, the touch signal line is connected to the light shielding layer through a first via hole, and the touch signal line is connected to the touch electrode through a second via hole.

Abstract: The present invention teaches a display device and its array substrate. The array substrate includes pixel units arranged in an array, each including pixel electrode, TFT, touch electrode, scan line, and data line. The scan and data lines are configured along first and second directions, respectively. The scan lines and data lines cross each other. The pixel electrodes are connected to the scan and data lines through the TFTs. Each pixel unit also includes first and second metallic lines configured along the first and second directions, respectively. The first and second metallic lines are disposed in a same layer as the scan and data lines, respectively. Two neighboring first metallic lines along the first direction are connected by a second metallic line. The first metallic lines are connected to the second metallic line through first vias. The second metallic line is connected to a touch electrode through a second via.

Abstract: Provided are a display device and a pixel structure thereof. The pixel structure comprises a plurality of pixel units arranged in an array, wherein each of the pixel units comprises three sub pixels, and the three sub pixels are respectively used to display three colors of red, green and blue, and each of the sub pixels comprises a bent portion, and bent portions of sub pixels on a same row have a same bent direction. In the provided pixel structure, each sub pixel includes a bent portion. The bent portions of the sub pixels on the same row are the same bent direction. Since the sub pixels include bent portions, the color distribution of the pixel structure in different directions can be made more uniform, thereby improving light transmittance and color gamut to promote display result.

Abstract: A low temperature polysilicon panel has an edge region, the edge region includes a polysilicon film layer and an interval spacer layer located above the polysilicon film layer; a row of dummy pixel units are provided on the interval spacer layer; a first conductive thin film layer is provided above the dummy pixel unit; a passivation layer is insulated between the dummy pixel unit and the first conductive thin film layer. The dummy pixel units includes a thin film transistor and a data line electrically connected thereto for accessing a common signal; a first hole provided on the interval spacer layer, and the polysilicon film layer electrically connected to the data line through the first hole. The low temperature polysilicon panel can lead the charge collected on the polysilicon film layer to avoid the edge wounded of the polysilicon panel and prevent the leakage of the polysilicon panel edge.

Abstract: An array substrate, a display panel, and a display are disclosed. At least one metal layer is added to make a contact with a first metal layer of an existing GOA circuit and to partially overlap with a second metal layer and/or poly-silicon layer of the existing GOA circuit in an insulated manner to form a capacitor, which means that at least one capacitor in series connection with existing capacitors is added, so that the capacitance of the GOA circuit is increased while the capacitor area of the GOA circuit is still the area of the existing capacitors, thus, facilitating the narrow-border design of LCDs.

Abstract: A low temperature polysilicon panel has an edge region, the edge region includes a polysilicon film layer and an interval spacer layer located above the polysilicon film layer; a row of dummy pixel units are provided on the interval spacer layer; a first conductive thin film layer is provided above the dummy pixel unit; a passivation layer is insulated between the dummy pixel unit and the first conductive thin film layer. The dummy pixel units includes a thin film transistor and a data line electrically connected thereto for accessing a common signal; a first hole provided on the interval spacer layer, and the polysilicon film layer electrically connected to the data line through the first hole. The low temperature polysilicon panel can lead the charge collected on the polysilicon film layer to avoid the edge wounded of the polysilicon panel and prevent the leakage of the polysilicon panel edge.

Abstract: The present disclosure relates to the field of display technologies, and discloses an array substrate and a display apparatus. The array substrate includes a base layer, pixel circuits and signal lines. The pixel circuits are disposed on the base layer in an array form, the signal lines are disposed on the base layer in a row direction or a column direction and coupled to the pixel circuits, and at least one of the signal lines is disposed at an outermost side of the pixel circuits disposed in the array form and at least one of the other signal lines that is disposed in a same direction with the signal line is disposed at the opposite outermost side of the pixel circuits disposed in the array form.

Abstract: An array substrate, a display panel, and a display are disclosed. At least one metal layer is added to make a contact with a first metal layer of an existing GOA circuit and to partially overlap with a second metal layer and/or poly-silicon layer of the existing GOA circuit in an insulated manner to form a capacitor, which means that at least one capacitor in series connection with existing capacitors is added, so that the capacitance of the GOA circuit is increased while the capacitor area of the GOA circuit is still the area of the existing capacitors, thus, facilitating the narrow-border design of LCDs.

Abstract: The present disclosure provides an array substrate and a method for manufacturing the same. The array substrate includes a base plate; a metal light-shielding layer disposed on a surface of the base plate; and a polysilicon layer disposed on the metal light-shielding layer. An area of the metal light-shielding layer is greater than or equal to an area of the polysilicon layer, and a projection of the polysilicon layer on the metal light-shielding layer falls within a region constricted by the metal light-shielding layer. A thickness of the polysilicon layer is uniform.

Abstract: A dummy circuit and a driving circuit of a flat panel display device is provided in the present application, including: a plurality of dummy scanning lines extending in a row direction and separated from each other; a plurality of data lines extending in a column direction and separated from each other, the plurality of data lines including an outer dummy data line in the outermost side; the dummy scanning lines intersecting with the dummy data lines to form a plurality of dummy pixel regions, dummy pixel electrodes provided in the dummy pixel regions; a plurality of thin film transistors connecting the pixel electrode to the corresponding dummy scanning lines and the dummy data lines; and wherein the outer dummy data line corresponding to at least one end portion of the of the dummy scanning line outwardly avoidance disposed to make the projections of the both staggered.

Abstract: A dummy circuit and a driving circuit of a flat panel display device is provided in the present application, including: a plurality of dummy scanning lines extending in a row direction and separated from each other; a plurality of data lines extending in a column direction and separated from each other, the plurality of data lines including an outer dummy data line in the outermost side; the dummy scanning lines intersecting with the dummy data lines to form a plurality of dummy pixel regions, dummy pixel electrodes provided in the dummy pixel regions; a plurality of thin film transistors connecting the pixel electrode to the corresponding dummy scanning lines and the dummy data lines; and wherein the outer dummy data line corresponding to at least one end portion of the of the dummy scanning line outwardly avoidance disposed to make the projections of the both staggered.

Abstract: Embodiments of the present disclosure provide a test circuit, a test method, a display panel and a display apparatus. Each of the signal input terminals may input a plurality of signals in a time division multiplexed manner, and in turn may be controlled by the corresponding switches to form a plurality of signal lines, a signal flow of the plurality of signal lines are totally different from each other under control of the switches. For example, one of the signal lines may function as a signal input line, and the other one of the signal lines may function as a signal input line for other specific testing, such as aging process so as to input signals different from the normal turn-on state signals. Consequently, by controlling the corresponding switches through the control signal terminals so that different input signals pass through different signal lines into the display panel to meet testing requirements of normal turn-on state testing, aging process and so on for the display panel.

Abstract: Disclosed is a thin film transistor, which includes a shading layer and a poly-silicon layer, the shading layer being arranged below the poly-silicon layer. when viewed from a top perspective, the shading layer and the poly-silicon layer have an angle therebetween, the angle being an acute angle or an obtuse angle. The thin film transistor breaks processing constrains and makes it possible to reduce the inclination degree of the poly-silicon layer at an edge of a sloping part of the shading layer in a larger range, thereby improving the conductivity of the poly-silicon layer.

Abstract: The present disclosure relates to a method of electrically aging a PMOS thin film transistor. The method includes applying a first voltage Vg with an amplitude of A volts to a gate of the PMOS thin film transistor; applying a second voltage Vs with an amplitude of (A?40) to (A?8) volts to a source of the PMOS thin film transistor; and applying a third voltage Vd with an amplitude of (A?80) to (A?16) volts to a drain of the PMOS thin film transistor. Application of the first voltage Vg, the second voltage Vs and the third voltage Vd is maintained for a predetermined time period, and Vd?Vs<0. In this way, reduction of a leakage current of the PMOS thin film transistor is achieved without changing a structural design of the thin film transistor.

Abstract: The present disclosure relates to a method of electrically aging a PMOS thin film transistor. The method includes applying a first voltage Vg with an amplitude of A volts to a gate of the PMOS thin film transistor; applying a second voltage Vs with an amplitude of (A-40) to (A-8) volts to a source of the PMOS thin film transistor; and applying a third voltage Vd with an amplitude of (A-80) to (A-16) volts to a drain of the PMOS thin film transistor. Application of the first voltage Vg, the second voltage Vs and the third voltage Vd is maintained for a predetermined time period, and Vd?Vs<0. In this way, reduction of a leakage current of the PMOS thin film transistor is achieved without changing a structural design of the thin film transistor.

Abstract: Embodiments of the present disclosure provide a test circuit, a test method, a display panel and a display apparatus. Each of the signal input terminals may input a plurality of signals in a time division multiplexed manner, and in turn may be controlled by the corresponding switches to form a plurality of signal lines, a signal flow of the plurality of signal lines are totally different from each other under control of the switches. For example, one of the signal lines may function as a signal input line, and the other one of the signal lines may function as a signal input line for other specific testing, such as aging process so as to input signals different from the normal turn-on state signals. Consequently, by controlling the corresponding switches through the control signal terminals so that different input signals pass through different signal lines into the display panel to meet testing requirements of normal turn-on state testing, aging process and so on for the display panel.

Abstract: A method and device for correcting a color shift of an OLED display panel, and a display device are disclosed. The method includes: performing an ageing treatment on the monochromatic luminescent devices in the OLED display panel; performing a luminescent lifetime attenuation test on the monochromatic luminescent devices after the ageing treatment respectively, and obtaining corresponding luminescent lifetime attenuation rates of the monochromatic luminescent devices; and performing an ageing treatment on the monochromatic luminescent device with rapidest luminescent lifetime attenuation rate again when differences between the luminescent lifetime attenuation rates of the monochromatic luminescent devices are greater than a preset threshold, until differences between the luminescent lifetime attenuation rates of the monochromatic luminescent devices are less than the preset threshold. The method effectively corrects the color shift phenomenon of display images of an OLED display product after long-term use.

Abstract: A method and device for correcting a color shift of an OLED display panel, and a display device are disclosed. The method includes: performing an ageing treatment on the monochromatic luminescent devices in the OLED display panel; performing a luminescent lifetime attenuation test on the monochromatic luminescent devices after the ageing treatment respectively, and obtaining corresponding luminescent lifetime attenuation rates of the monochromatic luminescent devices; and performing an ageing treatment on the monochromatic luminescent device with rapidest luminescent lifetime attenuation rate again when differences between the luminescent lifetime attenuation rates of the monochromatic luminescent devices are greater than a preset threshold, until differences between the luminescent lifetime attenuation rates of the monochromatic luminescent devices are less than the preset threshold. The method effectively corrects the color shift phenomenon of display images of an OLED display product after long-term use.

Abstract: The present disclosure provides a device and a method for transferring a display panel. The device includes a carrier configured to transfer the display panel, and a light-shielding plate secured onto the carrier and configured to shield a display region of the display panel when the display panel enters an irradiation region.