Abstract: An electronic device includes a substrate, a side wiring, a protective film, and a first filler. The substrate has a first surface, a second surface, and a side surface connected between the first surface and the second surface. The side wiring is disposed on the substrate and extends from the first surface to the second surface through the side surface. The protective film is disposed on the side wiring. The side wiring is sandwiched between the substrate and the protective film. An edge of the protective film extends beyond a side wall of the side wiring, and the protective film, the side wall of the side wiring, and the substrate define a gap. The first filler is disposed on the protective film and in the gap, wherein the first filler includes a first material and a plurality of particles mixed within the first material.

Abstract: A portable electronic device includes a housing, a heat-dissipation component, a bracket, a door structure, a driving mechanism, and a driven linkage. The housing includes a heat-dissipation opening disposed in the housing. The bracket is disposed in the housing and surrounds the heat-dissipation component. The door structure is configured to move between a closed position covering the heat-dissipation opening and an open position exposing the heat-dissipation opening. The driving mechanism is coupled between the bracket and the door structure to drive the door structure to rotate and move. The driven linkage is coupled between the bracket and the door structure. When the door structure is driven to rotate and move, the door structure drives the driven linkage to rotate and move, so that the driven linkage and the driving mechanism jointly drive the door structure to move between the closed position and the open position.

Abstract: In an embodiment, a system, includes: a first pressurized load port interfaced with a workstation body; a second pressurized load port interfaced with the workstation body; the workstation body maintained at a set pressure level, wherein the workstation body comprises an internal material handling system configured to move a semiconductor workpiece within the workstation body between the first and second pressurized load ports at the set pressure level; a first modular tool interfaced with the first pressurized load port, wherein the first modular tool is configured to process the semiconductor workpiece; and a second modular tool interfaced with the second pressurized load port, wherein the second modular tool is configured to inspect the semiconductor workpiece processed by the first modular tool.

Abstract: A user equipment assistance information (UAI) negotiation method, for a user equipment (UE) of mobile communication includes receiving a first OtherConfig element of an RRC reconfiguration message comprising a plurality of configuration parameters with SETUP values from a network terminal; sending a first UAI including a first value of a first configuration parameter of the configuration parameters to the network terminal; and receiving a first RRC reconfiguration message corresponding to the first UAI from the network terminal.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric (IMD) layer on a substrate and a metal interconnection in the first IMD layer, forming a magnetic tunneling junction (MTJ) and a top electrode on the metal interconnection, forming a spacer adjacent to the MTJ and the top electrode, forming a second IMD layer around the spacer, forming a cap layer on the top electrode, the spacer, and the second IMD layer, and then patterning the cap layer to form a protective cap on the top electrode and the spacer.

Abstract: A layout pattern for magnetoresistive random access memory (MRAM) includes a substrate having a first active region, a second active region, and a word line connecting region between the first active region and the second active region, a first gate pattern extending along a first direction from the first active region to the second active region, a second gate pattern extending along the first direction from the first active region to the second active region, a first magnetic tunneling junction (MTJ) between the first gate pattern and the second pattern and within the word line connecting region, and a second MTJ between the first gate pattern and the second gate pattern in the first active region. Preferably, top surfaces of the first MTJ and the second MTJ are coplanar.

Abstract: A throttle control method for a mobile device include collecting input data, generating a first set of user experience indices according to the input data, and checking whether a user experience index of the first set of user experience indices satisfies a UEI threshold. The input data includes common information data, current configuration data and a plurality of throttle control parameters. Each user experience index of the first set of user experience indices is corresponding to at least one of throttle control parameter of the plurality of throttle control parameters.

Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.

Abstract: A panel device including a substrate, a conductor pad, a turning wire, and a circuit board is provided. The substrate has a first surface and a second surface connected to the first surface while a normal direction of the second surface is different from a normal direction of the first surface. The conductor pad is disposed on the first surface of the substrate. The turning wire is disposed on the substrate and extends from the first surface to the second surface. The turning wire includes a wiring layer in contact with the conductor pad and a wire covering layer covering the wiring layer. The circuit board is bonded to and electrically connected to the wire covering layer. A manufacturing method of a panel device is also provided herein.

Abstract: A semiconductor device includes a substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed on the substrate, around a first metal interconnection. The second dielectric layer is disposed on the first dielectric layer, around a via and a second metal interconnection. The second metal interconnection directly contacts the first metal interconnection. The third dielectric layer is disposed on the second dielectric layer, around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection. The third metal interconnection directly contacts top surfaces of the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.

Abstract: An electronic device with light emitting function includes a casing, a circuit board, a light-shielding member, a first light-guiding member, and a second light-guiding member. The casing has a light-guiding cover plate having a first partial block and a second partial block. The circuit board has a light-emitting element adjacent to the first partial block. The light-shielding member is blocked between the light-emitting element and the first partial block. The first light-guiding member has a first reflective inclination surface at a light-emitting direction of the light-emitting element and configured to reflect a light emitted by the light-emitting element to be a first reflected light which is transmitted toward a direction away from the first partial block. The second light-guiding member has a second reflective inclination surface configured to reflect the first reflected light to be a second reflected light which is irradiated to the second partial block.

Abstract: A magnetoresistive random access memory, including a substrate, a conductive plug in the substrate, wherein the conductive plug has a notched portion on one side of the upper edge of the conductive plug, and a magnetic memory cell with a bottom electrode electrically connecting with the conductive plug, a magnetic tunnel junction on the bottom electrode and a top electrode on the magnetic tunnel junction, wherein the bottom surface of the magnetic memory cell and the top surface of the conductive plug completely align and overlap each other.

Abstract: A backlight module for illuminating a keycap includes a shielding sheet, a light guide panel, a lighting board disposed under the light guide panel, and a first protrusion structure. The shielding sheet includes a light permeable area. The light guide panel is disposed under the shielding sheet and has a light guide hole for accommodating a light source of the lighting board. The first protrusion structure is formed on the shielding sheet and protrudes toward the light source. The first protrusion structure is at least partially not overlapped with the light source in a vertical direction, for reflecting and scattering at least partial light of the light source to enter the light guide panel for lateral transmission.

Abstract: The present disclosure is directed to methods and devices for devices including multiple die. A wafer is received having a plurality of die and a plurality of scribe lines. A dicing process is performed on the wafer. The dicing process includes identifying a first scribe line of the plurality of scribe lines, the first scribe line interposing a first die and a second die of the plurality of die; and performing a partial cut on the first scribe line. In embodiments, other scribe lines of the wafer are, during the dicing process, fully cut. After the dicing, the first die and the second die are mounted on a substrate such as an interposer. The first die and the second die are connected by a portion of the first scribe line, e.g., remaining from the partial cut, during the mounting.

Abstract: A method for processing a static pattern in an image and a circuit system are provided. In the method, each of frames of a video is divided into multiple areas. Several algorithms are used to calculate a static pattern index of every area. The static pattern index is used as a reference for determining if the area covers part or entire of a static pattern. An index threshold can be used to check the areas that are determined as the static pattern initially. A time threshold is then used to confirm the areas with the static pattern in every frame. Image data of the areas which are determined as the static patterns can then be adjusted, such as having brightness of the area that is determined as part or entire of the static patterns decreased, for preventing the display panel from negative effects of the static pattern.

Abstract: An integrated circuit package includes an interposer, the interposer including: a first redistribution layer, a second redistribution layer over the first redistribution layer in a central region of the interposer, a dielectric layer over the first redistribution layer in a periphery of the interposer, the dielectric layer surrounding the second redistribution layer in a top-down view, a third redistribution layer over the second redistribution layer and the dielectric layer, and a first direct via extending through the dielectric layer. A conductive feature of the third redistribution layer is coupled to a conductive feature of the first redistribution layer through the first direct via.

Abstract: A hybrid random access memory for a system-on-chip (SOC), including a semiconductor substrate with a MRAM region and a ReRAM region, a first dielectric layer on the semiconductor substrate, multiple ReRAM cells in the first dielectric layer on the ReRAM region, a second dielectric layer above the first dielectric layer, and multiple MRAM cells in the second dielectric layer on the MRAM region.

Abstract: A circuit board module includes a circuit board, a metal core printed circuit board, and a heating element. The circuit board includes a substrate, and a surface of the substrate has an assembling region. The metal core printed circuit board is on the assembling region and includes a first circuit layer and a second circuit layer. The first circuit layer and the second circuit layer are electrically connected to each other. The second circuit layer is electrically connected to the circuit board. The thermal conductivity of the metal core printed circuit board is greater than the thermal conductivity of the substrate. The heating element is on the metal core printed circuit board and is electrically connected to the first circuit layer. An electronic device having the circuit board module is also provided.

Abstract: An information handling system executing an intelligent throughput performance analysis and issue detection system may comprise a network interface device to establish a wireless link with a wireless network and a processor to execute a neural network trained to predict wireless link throughput values based on controlled connectivity testing metrics gathered in a controlled laboratory from tested information handling systems. The processor may gather measured throughput of the wireless link and operational connectivity metrics for the information handling system that describe antenna positional information, antenna adaptation controller parameters, signal strength measurements, and wireless link performance metrics. The neural network may output, based on the gathered operational connectivity metrics a predicted throughput value that differs from the measured throughput by a maximum tolerance.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric (IMD) layer on a substrate and a metal interconnection in the first IMD layer, forming a magnetic tunneling junction (MTJ) and a top electrode on the metal interconnection, forming a spacer adjacent to the MTJ and the top electrode, forming a second IMD layer around the spacer, forming a cap layer on the top electrode, the spacer, and the second IMD layer, and then patterning the cap layer to form a protective cap on the top electrode and the spacer.