Abstract: A memory device can be directly mounted on a motherboard supporting DDR3 SDRAM, and then the memory device have advantages of the fly-by bus topology and the T branch topology established by the joint electron device engineering council (JEDEC). Thus, the system performance of a desktop computer in a unit interval can be enhanced.

Abstract: The invention discloses a circuit board. The circuit board includes a body having an electric component holding portion according to the invention. A plurality of groups of fixing holes for fixing various types of heat dissipating devices are formed on the body adjacent to the electric component holding portion. With such a systematized layout, as a result, the number of fixing holes arranged is increased to improve the compatibility of circuit board for various heat dissipating devices, in spite of a limited space allowed on the circuit board.

Abstract: An adapter module is described. The adapter module includes a circuit board, a first socket and an adapter device. One face of the first socket is electrically connected to the circuit board on the first face of the circuit. The other face of the first socket connects to a first central processing unit (CPU). One face of the adapter base is electrically connected to the circuit board on the second face of the circuit board. The other face of the adapter base connects to a second socket. The circuit board sends signals from the second socket, through the adapter base and the first socket, to the first CPU. When the adapter base is not connected to the second socket, the second socket is capable of connecting to a second kind of CPU.

Abstract: The invention provides a voltage-controlled device, method and computer device capable of dynamically regulating voltage and effectively saving energy. The voltage-controlled device receives a VID from a CPU, determines a core voltage according to a load line defined therein, and supplies the core voltage to the CPU. The voltage-controlled device has a load line register set and a write logic. The load line register set has a plurality of registers, and the values of which represent the defined load line. The write logic changes the values of the registers in the load line register set according to a write signal.

Abstract: A modularized motherboard is provided. The modularized motherboard includes a first circuit board, a second circuit board and a connecting device. The first circuit board includes a north bridge chip, a central processing unit (CPU) slot and a first connecting port. The CPU slot is coupled to the north bridge chip and is used for installing a CPU. The second circuit board is independent of the first circuit board. The second circuit board includes a second connecting port and a south bridge chip. The south bridge chip is coupled to the north bridge chip via the second connecting port the first connecting port. The connecting device is coupled between the first connecting port and the second connecting port.

Abstract: A memory device can be directly mounted on a motherboard supporting DDR3 SDRAM, and then the memory device have advantages of the fly-by bus topology and the T branch topology established by the joint electron device engineering council (JEDEC). Thus, the system performance of a desktop computer in a unit interval can be enhanced.

Abstract: A main-board comprises a CPU, a chipset and a clock-rate control-signal generating module. The chipset has at least a phase-locked circuit, a CPU-bus circuit and a memory-bus circuit. The phase-locked circuit is electrically connected to the CPU-bus circuit and the memory-bus circuit. The CPU-bus circuit is electrically connected to the CPU. The clock-rate control-signal generating module generates a clock-rate control signal and is electrically connected to the CPU and the chipset. The clock-rate control signal is transmitted to the phase-locked circuit of the chipset. The phase-locked circuit resets the ratio of the information-transmitting frequency of the CPU-bus circuit to the information-transmitting frequency of the memory-bus circuit in accordance with the clock-rate control signal.

Abstract: A printed circuit board structure includes a signal reference layer exposed at the surface of the printed circuit board.

Abstract: An adapter module is described. The adapter module includes a circuit board, a first socket and an adapter device. One face of the first socket is electrically connected to the circuit board on the first face of the circuit. The other face of the first socket connects to a first central processing unit (CPU). One face of the adapter base is electrically connected to the circuit board on the second face of the circuit board. The other face of the adapter base connects to a second socket. The circuit board sends signals from the second socket, through the adapter base and the first socket, to the first CPU. When the adapter base is not connected to the second socket, the second socket is capable of connecting to a second kind of CPU.

Abstract: A main-board comprises a CPU, a chipset and a clock-rate control-signal generating module. The chipset has at least a phase-locked circuit, a CPU-bus circuit and a memory-bus circuit. The phase-locked circuit is electrically connected to the CPU-bus circuit and the memory-bus circuit. The CPU-bus circuit is electrically connected to the CPU. The clock-rate control-signal generating module generates a clock-rate control signal and is electrically connected to the CPU and the chipset. The clock-rate control signal is transmitted to the phase-locked circuit of the chipset. The phase-locked circuit resets the ratio of the information-transmitting frequency of the CPU-bus circuit to the information-transmitting frequency of the memory-bus circuit in accordance with the clock-rate control signal.

Abstract: A power supply system includes a main power regulator, standby power regulator and automatic electronic switch. The main power regulator having a first rectifier outputs a first voltage signal to provide the main power. The standby power regulator having a second rectifier outputs a standby voltage signal to provide the standby power. The automatic electronic switch receives the standby voltage signal in response to a PSON (Power Supply ON) signal and outputs a second voltage signal to alternatively provide the main power.

Abstract: A power supply system includes a main power regulator, standby power regulator and automatic electronic switch. The main power regulator having a first rectifier outputs a first voltage signal to provide the main power. The standby power regulator having a second rectifier outputs a standby voltage signal to provide the standby power. The automatic electronic switch receives the standby voltage signal in response to a PSON (Power Supply ON) signal and outputs a second voltage signal to alternatively provide the main power.