Patents by Inventor Yueh-Liang Hsu

Yueh-Liang Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Quad flat non-leaded package
    Patent number: 8957506
    Abstract: A quad flat non-leaded package including a leadframe, a chip, a plurality of first bonding wires and a molding compound is provided. The leadframe includes a plurality of first leads, and each first lead has a first portion and a second portion that extend along an axis. The length of the first portion is greater than the length of the second portion. The thickness of the first portion is greater than the thickness of the second portion. The chip is disposed on the leadframe and covers a portion of the first portions. The first bonding wires are connected between the chip and another portion of the first portions or the chip and the second portions, such that the chip is electrically connected to the first leads through the first bonding wires. The molding compound encapsulates a portion of the first leads, the chip and the first bonding wires.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: February 17, 2015
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Yueh-Liang Hsu, Chi-Wen Chang
  • QUAD FLAT NON-LEADED PACKAGE
    Publication number: 20100219518
    Abstract: A quad flat non-leaded package including a leadframe, a chip, a plurality of first bonding wires and a molding compound is provided. The leadframe includes a plurality of first leads, and each first lead has a first portion and a second portion that extend along an axis. The length of the first portion is greater than the length of the second portion. The thickness of the first portion is greater than the thickness of the second portion. The chip is disposed on the leadframe and covers a portion of the first portions. The first bonding wires are connected between the chip and another portion of the first portions or the chip and the second portions, such that the chip is electrically connected to the first leads through the first bonding wires. The molding compound encapsulates a portion of the first leads, the chip and the first bonding wires.
    Type: Application
    Filed: October 14, 2009
    Publication date: September 2, 2010
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yueh-Liang Hsu, Chi-Wen Chang