Abstract: A coil module is provided, including a second coil mechanism. The second coil mechanism includes a third coil assembly and a second base corresponding to the third coil assembly. The second base has a positioning assembly corresponding to a first coil mechanism.

Abstract: An improved modularized socket structure comprises: a main socket module, first, second and third polar main jacks are formed on a main conductive component of the module; at least one expansion socket module, first, second and third polar expansion jacks are formed on an expansion conductive component of the module; a sub-socket module, first, second and third polar sub-jacks are formed on a sub-conductive component of the module; and an expansion conductive plate set comprising first, second and third conductive plates, the first conductive plate has first extension portions inserted into first polar main jack, first polar expansion jack and first polar sub-jack, the second conductive plate has second extension portions inserted into second polar main jack, second polar expansion jack and second polar sub-jack, and the third conductive plate has third extension portions inserted into third polar main jack, third polar expansion jack and third polar sub-jack.

Abstract: A method of fabricating a photonic device includes: forming a photonic device structure that includes a SOI substrate, which includes a bulk substrate layer, a buried oxide layer on the bulk substrate layer and an active semiconductor layer on the buried oxide layer; forming an electrically conducting layer in electrical contact of the buried oxide layer, and forming a BEOL structure on a surface of the active silicon layer.

Abstract: A method of fabricating a photonic device includes: forming a photonic device structure that includes a SOI substrate, which includes a bulk substrate layer, a buried oxide layer on the bulk substrate layer and an active semiconductor layer on the buried oxide layer; forming an electrically conducting layer in electrical contact of the buried oxide layer, and forming a BEOL structure on a surface of the active silicon layer.

Abstract: An improved modularized socket structure comprises: a main socket module, first, second and third polar main jacks are formed on a main conductive component of the module; at least one expansion socket module, first, second and third polar expansion jacks are formed on an expansion conductive component of the module; a sub-socket module, first, second and third polar sub-jacks are formed on a sub-conductive component of the module; and an expansion conductive plate set comprising first, second and third conductive plates, the first conductive plate has first extension portions inserted into first polar main jack, first polar expansion jack and first polar sub-jack, the second conductive plate has second extension portions inserted into second polar main jack, second polar expansion jack and second polar sub-jack, and the third conductive plate has third extension portions inserted into third polar main jack, third polar expansion jack and third polar sub-jack.

Abstract: A photonic device includes an optical coupler, a photodetector, a waveguide structure, a metal-dielectric stack, a contact, an interlayer dielectric layer, and a protection layer. The optical coupler, the photodetector, and the waveguide structure are over a substrate. The waveguide structure is laterally connected to the optical couple. A top of the waveguide structure is lower than a top of the optical coupler. The metal-dielectric stack is over the optical coupler, the photodetector, and the waveguide structure. The metal-dielectric stack has a hole above the optical coupler. The contact connects the photodetector to the metal-dielectric stack. The interlayer dielectric layer is below the metal-dielectric stack and surrounds the contact. The protection layer lines the hole of the metal-dielectric stack. A bottom surface of the protection layer is lower than a top surface of the contact.

Abstract: A photonic device includes an optical coupler, a waveguide structure, a metal-dielectric stack, and a protection layer. The optical coupler is over a semiconductor substrate. The waveguide structure is over the semiconductor substrate and laterally connected to the optical coupler. A top of the waveguide structure is lower than a top of the optical coupler. The metal-dielectric stack is over the optical coupler and the waveguide structure. The metal-dielectric stack has a hole above the optical coupler. The protection layer lines the hole of the metal-dielectric stack.

Abstract: An improved structure of a universal socket with polarity correction comprising: a cover, a wedging body disposed under the cover, and a shell disposed under the wedging body. The cover is formed with first neutral, first live wire, second neutral, and second live wire electrode socket holes. The wedging body is formed with first neutral electrode, first live wire electrode, second neutral electrode, and second live wire electrode holding holes. Neutral and live wire electrode plate accommodating grooves, and an electrode plate assembly are disposed in the shell. The electrode plate assembly comprises a first neutral electrode plate and a second neutral electrode plate electrically connected to each other and disposed in the neutral electrode plate accommodating groove, and further comprises a first live wire electrode plate and a second live wire electrode plate electrically connected to each other and disposed in the live wire electrode plate accommodating groove.

Abstract: An improved structure of a universal socket with polarity correction comprising: a cover, a wedging body disposed under the cover, and a shell disposed under the wedging body. The cover is formed with first neutral, first live wire, second neutral, and second live wire electrode socket holes. The wedging body is formed with first neutral electrode, first live wire electrode, second neutral electrode, and second live wire electrode holding holes. Neutral and live wire electrode plate accommodating grooves, and an electrode plate assembly are disposed in the shell. The electrode plate assembly comprises a first neutral electrode plate and a second neutral electrode plate electrically connected to each other and disposed in the neutral electrode plate accommodating groove, and further comprises a first live wire electrode plate and a second live wire electrode plate electrically connected to each other and disposed in the live wire electrode plate accommodating groove.

Abstract: A method of fabricating a photonic device includes: forming a photonic device structure that includes a SOI substrate, which includes a bulk substrate layer, a buried oxide layer on the bulk substrate layer and an active semiconductor layer on the buried oxide layer; forming an electrically conducting layer in electrical contact of the buried oxide layer, and forming a BEOL structure on a surface of the active silicon layer.

Abstract: An optical structure may be provided by forming a silicon grating structure over a dielectric material layer, depositing at least one dielectric material layer over the silicon grating structure, and depositing at least one dielectric etch stop layer over the at least one dielectric material layer. The at least one dielectric etch stop layer includes at least one dielectric material selected from silicon nitride and silicon oxynitride. A passivation dielectric layer may be formed over the at least one dielectric etch stop layer, and a patterned etch mask layer may be formed over the passivation dielectric layer. An opening may be formed through an unmasked portion of the passivation dielectric layer by performing an anisotropic etch process that etches the dielectric material selective to a silicon nitride or silicon oxynitride using the patterned etch mask layer as a masking structure. The at least one etch mask layer minimizes overetching.

Abstract: A photonic device includes an optical coupler, a waveguide structure, a metal-dielectric stack, and a protection layer. The optical coupler is over a semiconductor substrate. The waveguide structure is over the semiconductor substrate and laterally connected to the optical coupler. A top of the waveguide structure is lower than a top of the optical coupler. The metal-dielectric stack is over the optical coupler and the waveguide structure. The metal-dielectric stack has a hole above the optical coupler. The protection layer lines the hole of the metal-dielectric stack.

Abstract: At least one doped silicon region is formed in a silicon layer of a semiconductor substrate, and a silicon oxide layer is formed over the silicon layer. A germanium-containing material portion is formed in the semiconductor substrate to provide a p-n junction or a p-i-n junction including the germanium-containing material portion and one of the at least one doped silicon region. A capping material layer that is free of germanium is formed over the germanium-containing material portion. A first dielectric material layer is formed over the silicon oxide layer and the capping material layer. The first dielectric material layer includes a mesa region that is raised from the germanium-containing material portion by a thickness of the capping material layer. The capping material layer may be a silicon capping layer, or may be subsequently removed to form a cavity. Dark current is reduced for the germanium-containing material portion.

Abstract: An optical structure may be provided by forming a silicon grating structure over a dielectric material layer, depositing at least one dielectric material layer over the silicon grating structure, and depositing at least one dielectric etch stop layer over the at least one dielectric material layer. The at least one dielectric etch stop layer includes at least one dielectric material selected from silicon nitride and silicon oxynitride. A passivation dielectric layer may be formed over the at least one dielectric etch stop layer, and a patterned etch mask layer may be formed over the passivation dielectric layer. An opening may be formed through an unmasked portion of the passivation dielectric layer by performing an anisotropic etch process that etches the dielectric material selective to a silicon nitride or silicon oxynitride using the patterned etch mask layer as a masking structure. The at least one etch mask layer minimizes overetching.

Abstract: A method for fabricating a photonic device is provided. The method includes forming an optical coupler and a waveguide structure connected to the optical coupler over a semiconductor substrate; forming a metal-dielectric stack over the optical coupler and the waveguide structure; etching a hole in the metal-dielectric stack and vertically overlapping the optical coupler; and forming a protection layer on a sidewall and a bottom of the hole.

Abstract: A method for fabricating a photonic device is provided. The method includes forming an optical coupler and a waveguide structure connected to the optical coupler over a semiconductor substrate; forming a metal-dielectric stack over the optical coupler and the waveguide structure; etching a hole in the metal-dielectric stack and vertically overlapping the optical coupler; and forming a protection layer on a sidewall and a bottom of the hole.

Abstract: A method for fabricating a photonic device is provided. The method includes patterning a semiconductor layer to form a waveguide structure, a semiconductor structure connected to the waveguide structure, and a dummy semiconductor structure disconnected from the waveguide structure and the semiconductor structure; epitaxially growing an epitaxial semiconductor feature over the semiconductor structure and a dummy epitaxial semiconductor feature over the dummy semiconductor structure; depositing a first capping film over the epitaxial semiconductor feature and the dummy epitaxial semiconductor feature; depositing a second capping film over the first capping film, wherein an oxide concentration of the second capping film is greater than an oxide concentration of the first capping film; and patterning the first and second capping films to form at least a dummy composite capping layer over the dummy epitaxial semiconductor feature.

Abstract: A universal adapter structure comprises a housing, a socket unit, a first plug unit and a second plug unit. The first and the second plug units have a rocking base, two plug terminals and a driving member, respectively. The rocking base is pivotally disposed on the housing, the two plug terminals are fixed on the rocking base, and the driving member is movably disposed on the housing. By pressing the driving member, the rocking base can be pivoted, thereby driving an outer end of the plug terminal to pivot toward a direction away from the housing.

Abstract: A cooling system includes a cooling device, a controller and a defrosting unit. The cooling device has a compressor, a condenser, an expander, an evaporator, a cooling channel and a coolant. The coolant is functioned in the evaporator to thermally exchange with a working fluid in a pipe. The controller is adapted for controlling the temperature of the working fluid by controlling the cooling device. The defrosting unit has a switch disposed on the cooling channel and located between the compressor and the condenser, and a defrosting channel connected with the switch. After passing through the switch, the coolant is optionally fed to anyone of the cooling channel and the defrosting channel. After flowing through the defrosting channel, the coolant passes through the evaporator and then flows back to the compressor. As a result, the cooling system is capable of fast defrosting without using a heater.