Abstract: An integrated circuit may be provided with power switching circuitry. The power switching circuitry may include a primary power switch and multiple auxiliary power switches. A power gating control circuit may output control signals for selectively activating the primary power switch and at least one of the auxiliary power switches to charge a gated voltage. One or more voltage detectors may be configured to monitor the gated voltage and to activate the remaining auxiliary power switches in response to detecting that the gated voltage exceeds one or more thresholds. Configured and operated in this way, inrush current surge protection can be achieved while charging up the gated voltage sufficiently fast.

Abstract: An embodiment may be described as a switched capacitor analog equalizer circuit with offset voltage cancellation, where an embodiment comprises an amplifier in which a feedback path from its output port to one of its input ports is provided during a reset phase, and where the amplifier's input port connected to the feedback path is also connected to one terminal of an offset-correction capacitor and one terminal of a sampling capacitor. The other terminal of the offset-correction capacitor is connected to a switch and the other terminal of the sampling capacitor is connected to an input port to receive a signal. During the reset phase, the switch is open, and during a sampling phase, the switch is closed so that the offset-correction capacitor and the sampling capacitor are connected in parallel. Other embodiments are described and claimed.

Abstract: A squelch detector that differentially detects a presence of a communication signal on a communication channel. The squelch detector being coupled to outputs of a differential offset bias amplifier to receive differential offset biased signals and generate a differential direct current signal.

Abstract: In an embodiment, an analog voltage recovery circuit comprising a plurality of capacitors having first terminals connected to a node having the analog voltage, and comprising a state machine, where during an operating mode the second terminals of the plurality of capacitors are coupled to a first rail, and where during a digitization mode the state machine couples the second terminals of a set of the plurality of capacitors to a second rail so that the analog voltage is closer to the second rail voltage than during the beginning of the digitization mode. In an embodiment, the analog voltage recovery circuit brings the node voltage to the second rail voltage at the end of the digitization mode, and then floats the node and couples the second terminals of the plurality of capacitors to the first rail to approximately restore the analog voltage. Other embodiments are described and claimed.

Abstract: Embodiments of a squelch detector are described herein.

Abstract: In an embodiment, an analog voltage recovery circuit comprising a plurality of capacitors having first terminals connected to a node having the analog voltage, and comprising a state machine, where during an operating mode the second terminals of the plurality of capacitors are coupled to a first rail, and where during a digitization mode the state machine couples the second terminals of a set of the plurality of capacitors to a second rail so that the analog voltage is closer to the second rail voltage than during the beginning of the digitization mode. In an embodiment, the analog voltage recovery circuit brings the node voltage to the second rail voltage at the end of the digitization mode, and then floats the node and couples the second terminals of the plurality of capacitors to the first rail to approximately restore the analog voltage. Other embodiments are described and claimed.

Abstract: An embodiment may be described as a switched capacitor analog equalizer circuit with offset voltage cancellation, where an embodiment comprises an amplifier in which a feedback path from its output port to one of its input ports is provided during a reset phase, and where the amplifier's input port connected to the feedback path is also connected to one terminal of an offset-correction capacitor and one terminal of a sampling capacitor. The other terminal of the offset-correction capacitor is connected to a switch and the other terminal of the sampling capacitor is connected to an input port to receive a signal. During the reset phase, the switch is open, and during a sampling phase, the switch is closed so that the offset-correction capacitor and the sampling capacitor are connected in parallel. Other embodiments are described and claimed.

Abstract: Briefly, in accordance with an embodiment of the invention, a method and circuit to perform an analog-to-digital conversion is provided. The method may include generating and storing a combined charge which is generated by combining an input charge and a reference charge.

Abstract: An embodiment of the invention is directed to a buffer circuit having a closed loop negative feedback amplifier that is coupled to continuously drive a node to a predetermined set voltage. A precharge circuit is coupled to selectively drive the node at a higher rate than the amplifier. The buffer circuit is particularly useful for reducing the recovery and settling time of the node voltage when the node is suddenly subjected to a large, capacitive load.

Abstract: An embodiment of the invention is directed to a metal oxide semiconductor field effect transistor (MOSFET) comparator, which includes a differential amplifier having first and second inputs and first and second outputs. A first offset storage device is connected to the first input at one end and receives a first input signal of the comparator at another end. A second offset storage device is connected to the second input at one end and receives the first input signal during an autozero time interval and a second input signal of the comparator thereafter. During the autozero time interval, offset voltages are stored. Thereafter, the offsets are cancelled when the input signals are applied to their respective storage device. In a particular embodiment of the invention, the amplifier features a dual purpose load that causes the amplifier to first preamplify and then regeneratively drives the outputs.

Abstract: A Charge Pump Avoiding Gain Degradation Due to the Body Effect. A charge pump having a first input and a first output, a stage of the charge pump including a first capacitor having a first node and a second node, the second node coupled to receive a first signal; a first p-type transistor having a first gate, a first source, and a first drain, the first gate being coupled to the first node and the first drain, the first source being coupled to the first input; a second capacitor having a third node and a fourth node, the fourth node coupled to receive a second signal; and a second p-type transistor having a second gate, a second source, and a second drain, the second gate being coupled to the third node and the second drain, the second source being coupled to the first drain, the second drain being coupled to the first output.

Abstract: An embodiment of the invention is directed to a voltage regulator that provides a conditioned reference voltage with high supply noise rejection. A reference circuit provides an input reference voltage. An operational amplifier (opamp) has a first opamp input coupled to the reference circuit, a second opamp input, and an opamp output to provide the conditioned reference voltage based on the input reference voltage. A differential MOS amplifier has a first input coupled to the opamp output and an output coupled to the second opamp input. The reference voltage is conditioned in accordance with the size of transistors in the differential amplifier. The voltage regulator may be used in different types of analog-to-digital converters, including those built for use with camera chips.

Abstract: An embodiment of the invention is directed to a voltage regulator that provides a conditioned reference voltage with high supply noise rejection. A reference circuit provides an input reference voltage. An operational amplifier (opamp) has a first opamp input coupled to the reference circuit, a second opamp input, and an opamp output to provide the conditioned reference voltage based on the input reference voltage. A differential MOS amplifier has a first input coupled to the opamp output and an output coupled to the second opamp input. The reference voltage is conditioned in accordance with the size of transistors in the differential amplifier. The voltage regulator may be used in different types of analog-to-digital converters, including those built for use with camera chips.