Patents by Inventor Yuen Yee Wong

Yuen Yee Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9093365
    Abstract: A method for forming a GaN-containing semiconductor structure is provided. The method comprises a substrate is provided, a nucleation layer is formed above the substrate, a diffusion blocking layer is formed above the nucleation layer, a strain relief layer is formed above the diffusion blocking layer, and a semiconductor layer is formed above the strain relief layer, in which the diffusion blocking layer is deposited on the nucleation layer such that the diffusion blocking layer can prevent the impurities out-diffusion from the substrate.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: July 28, 2015
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Yi Chang, Yuen Yee Wong, Chi Feng Hsieh
  • Publication number: 20150102357
    Abstract: A method for forming a GaN-containing semiconductor structure is provided. The method comprises a substrate is provided, a nucleation layer is formed above the substrate, a diffusion blocking layer is formed above the nucleation layer, a strain relief layer is formed above the diffusion blocking layer, and a semiconductor layer is formed above the strain relief layer, in which the diffusion blocking layer is deposited on the nucleation layer such that the diffusion blocking layer can prevent the impurities out-diffusion from the substrate.
    Type: Application
    Filed: February 26, 2014
    Publication date: April 16, 2015
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Yi CHANG, Yuen Yee WONG, Chi Feng HSIEH
  • Publication number: 20110239932
    Abstract: The present invention discloses a method to grow group III-nitride materials on a non-native substrate with much reduced threading dislocation (TD) density and smooth surface by using MBE. The first layer is to suppress the formation of screw TD while the second layer is to bend the propagation of edge TD. After that, the migration enhanced epitaxy (MEE) approach is used to smoothen the second layer surface before a main layer of group III-nitride is growth to the thickness required for different applications. All of these steps are performed in the MBE reactor by carefully control over the arrival rate and sequence of group III atoms and nitrogen radicals onto the sample substrate. By using reflective high energy electron diffraction (RHEED), the change of each layer's surface morphology can be monitored during the growth to achieve the high quality group III-nitride materials.
    Type: Application
    Filed: October 5, 2010
    Publication date: October 6, 2011
    Applicant: National Chiao Tung University
    Inventors: Edward Yi Chang, Yuen Yee Wong