Patents by Inventor Yueying Liu

Yueying Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240076460
    Abstract: The present invention provides a non-porous, breathable and waterproof transparent plastic film on a plastic substrate and methods for fabricating the same. The film includes a thermoplastic polyester resin, an amphiphilic modifier having a hydrophilic segment that acts as a channel for water vapor transmission through the film connected to a hydrophobic segment that anchors the amphiphilic modifier to a portion of the polyurethane base resin and a compatibilizer. The resultant non-porous, breathable and waterproof transparent plastic film has a water vapor transmission rate (WVTR) or breathability of not less than 250 g/m2/24 hr according to ASTM E96B, and having at least 90% of the transmittance. They are also resistant to liquid penetration and micro-contaminants such as bacteria and virus, making them suitable for broad applications in medical, healthcare and food packaging industries.
    Type: Application
    Filed: August 16, 2022
    Publication date: March 7, 2024
    Applicant: Nano and Advanced Materials Institute Limited
    Inventors: Xianqiao LIU, Fengyu YANG, Yik Wong NG, Yueying CHEN
  • Publication number: 20240076491
    Abstract: The present invention provides a non-porous, breathable and waterproof transparent elastomer film and methods for fabricating the same. The film includes a polyurethane (PU) and an amphiphilic modifier having a hydrophilic segment that acts as a channel for water vapor transmission through the film connected to a hydrophobic segment that anchors the amphiphilic modifier to a portion of the polyurethane base resin. The resultant non-porous, breathable and waterproof transparent elastomer film has a water vapor transmission rate (WVTR) or breathability of not less than 300 g/m2/24 hr according to ASTM E96B, and having at least 90% of the transmittance. The film is also resistant to liquid penetration and micro-contaminants such as bacteria and virus, making it suitable for broad applications in medical, healthcare and food packaging industries.
    Type: Application
    Filed: August 16, 2022
    Publication date: March 7, 2024
    Inventors: Xianqiao LIU, Yik Wong NG, Fengyu YANG, Yueying CHEN
  • Patent number: 11692827
    Abstract: A white light interferometric fiber-optic gyroscope based on a rhombic optical path difference bias structure includes a laser, a rhombic optical path difference bias structure, a fiber coil and a photodetector. The white light interferometric fiber-optic gyroscope adopts an all-fiber structure to simplify the complexity of a gyroscope system and reduce the overall cost. A white light interferometric demodulation algorithm is used to realize linear output of rotation rate signals.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: July 4, 2023
    Assignee: DALIAN UNIVERSITY OF TECHNOLOGY
    Inventors: Zhenguo Jing, Wei Peng, Ang Li, Yueying Liu, Qiang Liu, Zhiyuan Huang, Yang Zhang
  • Patent number: 11658234
    Abstract: A transistor device includes a semiconductor epitaxial layer structure including a channel layer and a barrier layer on the channel layer, a source contact and a drain contact on the barrier layer, an insulating layer on the semiconductor layer between the source contact and the drain contact, and a gate contact on the insulating layer. The gate contact includes a central portion that extends through the insulating layer and contacts the barrier layer and a drain side wing that extends laterally from the central portion of the gate toward the drain contact by a distance ?D. The drain side wing of the gate contact is spaced apart from the barrier layer by a distance d1 that is equal to a thickness of the insulating layer. The distance ?D is less than about 0.3 ?m, and the distance d1 is less than about 80 nm.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: May 23, 2023
    Assignee: Wolfspeed, Inc.
    Inventors: Kyle Bothe, Terry Alcorn, Dan Namishia, Jia Guo, Matt King, Saptharishi Sriram, Jeremy Fisher, Fabian Radulescu, Scott Sheppard, Yueying Liu
  • Publication number: 20220349713
    Abstract: A white light interferometric fiber-optic gyroscope based on a rhombic optical path difference bias structure includes a laser, a rhombic optical path difference bias structure, a fiber coil and a photodetector. The white light interferometric fiber-optic gyroscope adopts an all-fiber structure to simplify the complexity of a gyroscope system and reduce the overall cost. A white light interferometric demodulation algorithm is used to realize linear output of rotation rate signals.
    Type: Application
    Filed: July 28, 2021
    Publication date: November 3, 2022
    Inventors: Zhenguo JING, Wei PENG, Ang LI, Yueying LIU, Qiang LIU, Zhiyuan HUANG, Yang ZHANG
  • Publication number: 20220328634
    Abstract: A transistor device includes a first unit subcell including having a first active region width extending in a first direction, and a second unit subcell having a second active region width extending in the first direction and arranged adjacent the first unit subcell in the first direction. The first unit subcell and the second unit subcell share a common drain contact and have separate gate contacts that are aligned in the first direction. Each unit subcell includes a field plate that is connected to a source contact outside the active region and that does not cross over the gate contact.
    Type: Application
    Filed: June 24, 2022
    Publication date: October 13, 2022
    Inventors: Kyle Bothe, Jia Guo, Yueying Liu, Jeremy Fisher, Scott T. Sheppard
  • Publication number: 20220130985
    Abstract: A transistor device includes a semiconductor epitaxial layer structure including a channel layer and a barrier layer on the channel layer, a source contact and a drain contact on the barrier layer, an insulating layer on the semiconductor layer between the source contact and the drain contact, and a gate contact on the insulating layer. The gate contact includes a central portion that extends through the insulating layer and contacts the barrier layer and a drain side wing that extends laterally from the central portion of the gate toward the drain contact by a distance ?D. The drain side wing of the gate contact is spaced apart from the barrier layer by a distance d1 that is equal to a thickness of the insulating layer. The distance ?D is less than about 0.3 ?m, and the distance d1 is less than about 80 nm.
    Type: Application
    Filed: May 20, 2021
    Publication date: April 28, 2022
    Inventors: Kyle Bothe, Terry Alcorn, Dan Namishia, Jia Guo, Matt King, Saptharishi Sriram, Jeremy Fisher, Fabian Radulescu, Scott Sheppard, Yueying Liu
  • Patent number: 11244831
    Abstract: A transistor device is provided. The transistor device includes a substrate, a channel layer on the substrate, the channel layer including a GaN material, a barrier layer that is on the channel layer and that includes an AlGaN material, a drain electrode that is on the barrier layer in a drain region of the device, a source ohmic structure that is at least partially recessed into the barrier layer in a source region of the device, a source electrode that is on the source ohmic structure and a gate contact that is on the barrier layer and that is in a gate region of the device that is between the drain region and the source region.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: February 8, 2022
    Assignee: Wolfspeed, Inc.
    Inventors: Saptharishi Sriram, Yueying Liu
  • Publication number: 20220026297
    Abstract: A miniature diaphragm-based fiber-optic tip FP pressure sensor, and fabrication method and application thereof. A miniature diaphragm-based fiber-optic tip FP pressure sensor includes an optical fiber, a hollow-core optical fiber, and a pressure sensing diaphragm, wherein the optical fiber and the hollow-core optical fiber have the same diameter, the two are spliced by arc welding; and the pressure sensing diaphragm is bonded to the endface of the hollow-core optical fiber by hydroxide catalysis bonding. The FP pressure sensor can not only realize the all-silica structure of a sensor, but also make the joint of each component free of organic polymer, and has extremely high long-term stability and thermal stability. Meanwhile, by means of a fabrication method of the miniature diaphragm-based fiber-optic tip FP pressure sensor, the application range and service life of the sensor are increased, and fabrication costs are reduced.
    Type: Application
    Filed: August 26, 2020
    Publication date: January 27, 2022
    Inventors: Zhenguo JING, Wei PENG, Yueying LIU, Qiang LIU, Ang LI
  • Publication number: 20210193825
    Abstract: A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.
    Type: Application
    Filed: March 3, 2021
    Publication date: June 24, 2021
    Inventors: Yueying Liu, Saptharishi Sriram, Scott Sheppard, Jennifer Gao
  • Patent number: 10978583
    Abstract: A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: April 13, 2021
    Assignee: Cree, Inc.
    Inventors: Yueying Liu, Saptharishi Sriram, Scott Sheppard, Jennifer Gao
  • Patent number: 10615273
    Abstract: A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: April 7, 2020
    Assignee: Cree, Inc.
    Inventors: Yueying Liu, Saptharishi Sriram, Scott Sheppard
  • Publication number: 20190333767
    Abstract: A transistor device is provided. The transistor device includes a substrate, a channel layer on the substrate, the channel layer including a GaN material, a barrier layer that is on the channel layer and that includes an AlGaN material, a drain electrode that is on the barrier layer in a drain region of the device, a source ohmic structure that is at least partially recessed into the barrier layer in a source region of the device, a source electrode that is on the source ohmic structure and a gate contact that is on the barrier layer and that is in a gate region of the device that is between the drain region and the source region.
    Type: Application
    Filed: July 3, 2019
    Publication date: October 31, 2019
    Applicant: Cree, Inc.
    Inventors: Saptharishi Sriram, Yueying Liu
  • Patent number: 10354879
    Abstract: A transistor device is provided. The transistor device includes a substrate, a channel layer on the substrate, the channel layer including a GaN material, a barrier layer that is on the channel layer and that includes an AlGaN material, a drain electrode that is on the barrier layer in a drain region of the device, a source ohmic structure that is at least partially recessed into the barrier layer in a source region of the device, a source electrode that is on the source ohmic structure and a gate contact that is on the barrier layer and that is in a gate region of the device that is between the drain region and the source region.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: July 16, 2019
    Assignee: CREE, INC.
    Inventors: Saptharishi Sriram, Yueying Liu
  • Publication number: 20190109222
    Abstract: A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.
    Type: Application
    Filed: November 19, 2018
    Publication date: April 11, 2019
    Inventors: Yueying Liu, Saptharishi Sriram, Scott Sheppard, Jennifer Gao
  • Publication number: 20180374943
    Abstract: A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.
    Type: Application
    Filed: June 21, 2017
    Publication date: December 27, 2018
    Inventors: Yueying Liu, Saptharishi Sriram, Scott Sheppard
  • Publication number: 20170373179
    Abstract: A transistor device is provided. The transistor device includes a substrate, a channel layer on the substrate, the channel layer including a GaN material, a barrier layer that is on the channel layer and that includes an AlGaN material, a drain electrode that is on the barrier layer in a drain region of the device, a source ohmic structure that is at least partially recessed into the barrier layer in a source region of the device, a source electrode that is on the source ohmic structure and a gate contact that is on the barrier layer and that is in a gate region of the device that is between the drain region and the source region.
    Type: Application
    Filed: June 22, 2017
    Publication date: December 28, 2017
    Inventors: Saptharishi Sriram, Yueying Liu