Patents by Inventor Yuezheng GUAN

Yuezheng GUAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Array substrate, manufacturing method thereof and display device
    Patent number: 10109653
    Abstract: An array substrate, a manufacturing method thereof and a display device are provided. The array substrate includes: a base substrate; a thin-film transistor and a first conductive layer formed on the base substrate; and a passivation layer formed on the TFT and the first conductive layer. The TFT includes a source electrode and a drain electrode; the first conductive layer is arranged in the same layer with the source electrode and the drain electrode; a second conductive layer is disposed on a side of the first conductive layer opposite to the passivation layer; the passivation layer is provided with a through hole penetrating therethrough; and an orthographic projection of the through hole on the base substrate falls within an orthographic projection of the first conductive layer on the base substrate and falls within an orthographic projection of the second conductive layer on the base substrate.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: October 23, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Baoli Liu, Hao Chen, Haizheng Xie, Yu Lin, Xiaohui Zhu, Yuezheng Guan
  • ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE
    Publication number: 20180219024
    Abstract: An array substrate, a manufacturing method thereof and a display device are provided. The array substrate includes: a base substrate; a thin-film transistor and a first conductive layer formed on the base substrate; and a passivation layer formed on the TFT and the first conductive layer. The TFT includes a source electrode and a drain electrode; the first conductive layer is arranged in the same layer with the source electrode and the drain electrode; a second conductive layer is disposed on a side of the first conductive layer opposite to the passivation layer; the passivation layer is provided with a through hole penetrating therethrough; and an orthographic projection of the through hole on the base substrate falls within an orthographic projection of the first conductive layer on the base substrate and falls within an orthographic projection of the second conductive layer on the base substrate.
    Type: Application
    Filed: May 12, 2017
    Publication date: August 2, 2018
    Inventors: Baoli LIU, Hao CHEN, Haizheng XIE, Yu LIN, Xiaohui ZHU, Yuezheng GUAN