Patents by Inventor Yufu Liu
Yufu Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240105659Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a redistribution layer (RDL) over a semiconductor die. A portion of the RDL contacts a die pad of the semiconductor die. A metal layer is formed on a top surface and sidewalls of the RDL and configured to encase the RDL. A non-conductive layer is formed over the metal layer and underlying RDL. An opening in the non-conductive layer is formed exposing a portion of the metal layer formed on the RDL. An under-bump metallization (UBM) is formed in the opening and conductively connected to the die pad by way of the metal layer and RDL.Type: ApplicationFiled: September 28, 2022Publication date: March 28, 2024Inventors: Kuan-Hsiang Mao, Yufu Liu, Wen Hung Huang, Tsung Nan Lo
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Patent number: 11935753Abstract: A method for forming a packaged integrated circuit device includes providing a semiconductor wafer having a plurality of integrated circuit devices, each integrated circuit device extending into the semiconductor wafer to a first depth, and grinding a backside of the silicon wafer to no more than the first depth. The method further includes forming a backside cut between the integrated circuit devices. The backside cut extends to within the first depth, but the backside cut does not extend completely through the semiconductor wafer. The backside cut exposes a plurality of edges of each of the integrated circuit devices. The method further includes depositing, on the backside of the wafer, a metallization layer on a bottom surface of the integrated circuit devices and on the edges.Type: GrantFiled: December 9, 2021Date of Patent: March 19, 2024Assignee: NXP B.VInventors: Kuan-Hsiang Mao, Wen Hung Huang, Che Ming Fang, Yufu Liu
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Publication number: 20240030173Abstract: An IC package includes one or more microelectronic devices, a plurality of package bumps disposed at a first side, and a metal structure electrically connecting at least a first device contact pad of a first microelectronic device and at least a first package bump of the plurality of package bumps. The metal structure includes an RDL trace extending between a first region aligned with the first device contact pad and a second region aligned with the first package bump, wherein the first package bump is mechanically and electrically connected directly to the second region of the RDL trace. The metal structure further includes a first via extending between the first region of the RDL trace and the first device contact pad and further includes a set of one or more support studs extending from the second region to a support surface facing the first side.Type: ApplicationFiled: July 19, 2022Publication date: January 25, 2024Inventors: Che Ming Fang, Kuan-Hsiang Mao, Yufu Liu, Wen Hung Huang
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Publication number: 20230378106Abstract: An electronic device substrate with a substantially planar surface formed from an electrically non-conductive material is provided with one or more metalized pads on the substantially planner surface. Each of the one or more metalized pads is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad is patterned such that portions of the metalized pad form metalized fingers that extend radially from the outer boundary of the metalized pad in an interdigitated arrangement with the first electrically nonconductive material. The metalized pad has a solderable surface.Type: ApplicationFiled: May 19, 2022Publication date: November 23, 2023Inventors: Namrata Kanth, Paul Southworth, Scott M. Hayes, Dwight Lee Daniels, Yufu Liu, Jeroen Johannes Maria Zaal, Cheong Chiang Ng
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Publication number: 20230378107Abstract: A semiconductor device package includes a semiconductor device and an electrically conductive pad disposed in contact with a surface of the semiconductor device. The semiconductor device package further includes a redistribution layer (RDL) formed over the electrically conductive pad and the surface of the semiconductor device, and an electrical connector disposed over and electrically coupled to the RDL. The RDL includes a first passivation layer disposed over a surface of the semiconductor device and the electrically conductive pad, and further includes an RDL trace. The RDL trace includes a first portion in contact with the electrically conductive pad, a second portion in contact with one of the electrical connector or an underlying metallization layer in contact with the electrical connector, and a third portion having a non-planar and undulating configuration relative to the surface of the semiconductor device.Type: ApplicationFiled: May 19, 2022Publication date: November 23, 2023Inventors: Kuan-Hsiang Mao, Yufu Liu, Tsung Nan Lo, Wen Hung Huang
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Publication number: 20230187211Abstract: A method for forming a packaged integrated circuit device includes providing a semiconductor wafer having a plurality of integrated circuit devices, each integrated circuit device extending into the semiconductor wafer to a first depth, and grinding a backside of the silicon wafer to no more than the first depth. The method further includes forming a backside cut between the integrated circuit devices. The backside cut extends to within the first depth, but the backside cut does not extend completely through the semiconductor wafer. The backside cut exposes a plurality of edges of each of the integrated circuit devices. The method further includes depositing, on the backside of the wafer, a metallization layer on a bottom surface of the integrated circuit devices and on the edges.Type: ApplicationFiled: December 9, 2021Publication date: June 15, 2023Inventors: Kuan-Hsiang Mao, Wen Hung Huang, Che Ming Fang, Yufu Liu
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Publication number: 20230187299Abstract: A method for manufacturing a packaged integrated circuit device includes providing a semiconductor wafer having a plurality of integrated circuit devices. Each integrated circuit device extends into the semiconductor wafer to a first depth. Prior to singulation of the integrated circuit devices on the semiconductor wafer, the method further includes forming a cut between the integrated circuit devices. The cut extends to at least the first depth, but does not extend completely through the semiconductor wafer. The cut exposes a plurality of edges of each of the integrated circuit devices. The method further includes depositing, on each integrated circuit device, a passivation layer on a top surface and on the edges.Type: ApplicationFiled: December 9, 2021Publication date: June 15, 2023Inventors: Kuan-Hsiang Mao, Che Ming Fang, Yufu Liu, Wen Hung Huang
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Patent number: 11640947Abstract: A packaging semiconductor device, such as a fan-out Wafer-Level Packaging (FOWLP) device, is fabricated by providing a semiconductor device (20) having conductive patterns (22) disposed on a first surface and then forming, on the conductive patterns, photoresist islands (24) having a first predetermined shape defined by a first critical width dimension and a minimum height dimension so that a subsequently-formed dielectric polymer layer (26) surrounds but does not cover each photoresist island (24), thereby allowing each photoresist island to be selectively removed from the one or more conductive patterns to form one or more via openings (28) in the dielectric polymer layer such that each via opening has a second predetermined shape which matches at least part of the first predetermined shape of the photoresist islands.Type: GrantFiled: May 28, 2021Date of Patent: May 2, 2023Assignee: NXP B.V.Inventors: Kuan-Hsiang Mao, Wen Hung Huang, Che Ming Fang, Yufu Liu
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Patent number: 11625729Abstract: A server receives target data sent by a mobile terminal, the target data carrying a parameter set, the parameter set including at least a target posture parameter of the mobile terminal. When the amount of change in posture variation is smaller than the preset variation threshold, such fact indicates that the posture when the mobile terminal sends the target data hardly changes compared with the postures that the mobile terminal historically sends the target data to the server. As the posture of the mobile terminal is frequently changed during the process of normal use of the mobile terminal, the target data sent by the mobile terminal without posture change is regarded as false data. Thus, the present techniques ensure the fairness and efficiency of data processing.Type: GrantFiled: January 19, 2018Date of Patent: April 11, 2023Assignee: Alibaba Group Holding LimitedInventor: Yufu Liu
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Publication number: 20230014470Abstract: Packaged semiconductor devices are disclosed, comprising: a semiconductor die having a top major surface with a plurality of contact pads thereon, and four sides, wherein the sides are stepped such that a lower portion of each side extends laterally beyond a respective upper portion; encapsulating material encapsulating the top major surface and the upper portion of each of the sides wherein the semiconductor die is exposed at the lower portion of each of the sides; a contact-redistribution structure on the encapsulating material over the top major surface of the semiconductor die; a plurality of metallic studs extending through the encapsulating material, and providing electrical contact between the contact pads and the contact-redistribution structure. Corresponding methods are also disclosed.Type: ApplicationFiled: July 16, 2021Publication date: January 19, 2023Inventors: Kuan-Hsiang Mao, Wen Hung Huang, Yufu Liu
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Publication number: 20220384372Abstract: A packaging semiconductor device, such as a fan-out Wafer-Level Packaging (FOWLP) device, is fabricated by providing a semiconductor device (20) having conductive patterns (22) disposed on a first surface and then forming, on the conductive patterns, photoresist islands (24) having a first predetermined shape defined by a first critical width dimension and a minimum height dimension so that a subsequently-formed dielectric polymer layer (26) surrounds but does not cover each photoresist island (24), thereby allowing each photoresist island to be selectively removed from the one or more conductive patterns to form one or more via openings (28) in the dielectric polymer layer such that each via opening has a second predetermined shape which matches at least part of the first predetermined shape of the photoresist islands.Type: ApplicationFiled: May 28, 2021Publication date: December 1, 2022Applicant: NXP B.V.Inventors: Kuan-Hsiang Mao, Wen Hung Huang, Che Ming Fang, Yufu Liu
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Patent number: 10124057Abstract: The present invention provides a method for enabling ducklings to quickly produce anti-avian influenza antibodies and maintain antibody titer, including: step 1) the first immunization is performed on ducklings at the age of 5 to 15 days: each duckling is inoculated with an avian influenza inactivated antigen in an abdomen, and simultaneously intramuscularly or subcutaneously immunized with an avian influenza inactivated oil-emulsion vaccine. In the method, through the double effects of intraperitoneal inoculation with the inactivated antigen and intramuscular or subcutaneous injection with the inactivated oil-emulsion vaccine on the ducklings, the ducklings can quickly produce an immune response so as to quickly produce the anti-avian influenza antibodies; and the immune dead time of the ducklings immunized with the avian influenza inactivated vaccine can be effectively reduced by more than 7 days.Type: GrantFiled: February 27, 2017Date of Patent: November 13, 2018Inventors: Ruiai Chen, Aiguo Zhang, Yufu Liu, Jiahua Xu, Shuqiong Zhang, Wenke Huang, Daxing Wu, Shichang Liao
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Publication number: 20180144348Abstract: A server receives target data sent by a mobile terminal, the target data carrying a parameter set, the parameter set including at least a target posture parameter of the mobile terminal. When the amount of change in posture variation is smaller than the preset variation threshold, such fact indicates that the posture when the mobile terminal sends the target data hardly changes compared with the postures that the mobile terminal historically sends the target data to the server. As the posture of the mobile terminal is frequently changed during the process of normal use of the mobile terminal, the target data sent by the mobile terminal without posture change is regarded as false data. Thus, the present techniques ensure the fairness and efficiency of data processing.Type: ApplicationFiled: January 19, 2018Publication date: May 24, 2018Inventor: Yufu Liu
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Publication number: 20170246289Abstract: The present invention provides a method for enabling ducklings to quickly produce anti-avian influenza antibodies and maintain antibody titer, including: step 1) the first immunization is performed on ducklings at the age of 5 to 15 days: each duckling is inoculated with an avian influenza inactivated antigen in an abdomen, and simultaneously intramuscularly or subcutaneously immunized with an avian influenza inactivated oil-emulsion vaccine. In the method, through the double effects of intraperitoneal inoculation with the inactivated antigen and intramuscular or subcutaneous injection with the inactivated oil-emulsion vaccine on the ducklings, the ducklings can quickly produce an immune response so as to quickly produce the anti-avian influenza antibodies; and the immune dead time of the ducklings immunized with the avian influenza inactivated vaccine can be effectively reduced by more than 7 days.Type: ApplicationFiled: February 27, 2017Publication date: August 31, 2017Inventors: Ruiai Chen, Aiguo Zhang, Yufu Liu, Jiahua Xu, Shuqiong Zhang, Wenke Huang, Daxing Wu, Shichang Liao