Abstract: A processing platform in one embodiment comprises one or more processing devices each including at least one processor coupled to a memory. The processing platform is configured to implement a crosslink identification and validation algorithm for processing multiple levels of mass spectrometry data in order to identify and validate protein-protein interactions within the mass spectrometry data. In conjunction with execution of the crosslink identification and validation algorithm, the processing platform is further configured to obtain mass spectrometry spectra for each of the multiple levels, to apply a header matching filter to identify at least one potential crosslink relating one or more first level spectra and one or more second level spectra utilizing a plurality of third level spectra, and to apply one or more mass validation filters to identify whether or not the potential crosslink is a valid crosslink.

Abstract: A processing platform in one embodiment comprises one or more processing devices each including at least one processor coupled to a memory. The processing platform is configured to implement a crosslink identification and validation algorithm for processing multiple levels of mass spectrometry data in order to identify and validate protein-protein interactions within the mass spectrometry data. In conjunction with execution of the crosslink identification and validation algorithm, the processing platform is further configured to obtain mass spectrometry spectra for each of the multiple levels, to apply a header matching filter to identify at least one potential crosslink relating one or more first level spectra and one or more second level spectra utilizing a plurality of third level spectra, and to apply one or more mass validation filters to identify whether or not the potential crosslink is a valid crosslink.

Abstract: A non-volatile memory device comprises an application code sector of sufficient size to store a first copy of an application code and a second copy of the application code; and a boot sector having a boot loader code embodied therein. The boot loader code is configured to cause a processor to check the integrity of both the first and second copies of the application code; if the first copy is corrupted, overwrite the first copy of the application code with the second copy; and if the second copy is corrupted, overwrite the second copy of the application code with the first copy.

Abstract: A microcontroller comprises a random access memory (RAM) device; a non-volatile memory device having a data sector, wherein operation codes are stored as data files in the data sector; and a processor configured to retrieve the operation codes from the data sector, load the retrieved operation codes into the RAM device and run the decrypted operation codes from the RAM device.

Abstract: A non-volatile memory device comprises an application code sector of sufficient size to store a first copy of an application code and a second copy of the application code; and a boot sector having a boot loader code embodied therein. The boot loader code is configured to cause a processor to check the integrity of both the first and second copies of the application code; if the first copy is corrupted, overwrite the first copy of the application code with the second copy; and if the second copy is corrupted, overwrite the second copy of the application code with the first copy.