Abstract: A semiconductor switch includes a plurality of first terminals, a second terminal commonly provided for the plurality of first terminals, a plurality of first MIS switches provided between the plurality of the first terminals and the second terminal, respectively, configured to pass-through or cut-off a high frequency signal between the plurality of the first terminals and the second terminal, and formed on a SOI substrate, and a capacitor formed on the SOI substrate, connected between the second terminal and the plurality of the first MIS switches, and provided for the plurality of the first terminals commonly.

Abstract: A semiconductor switch includes a plurality of first terminals, a second terminal commonly provided for the plurality of first terminals, a plurality of first MIS switches provided between the plurality of the first terminals and the second terminal, respectively, configured to pass-through or cut-off a high frequency signal between the plurality of the first terminals and the second terminal, and formed on a SOI substrate, and a capacitor formed on the SOI substrate, connected between the second terminal and the plurality of the first MIS switches, and provided for the plurality of the first terminals commonly.

Abstract: A communication circuit includes a first switch circuit having a first terminal at which a first signal of a first frequency can be input, a second terminal at which a second signal of a second frequency can be input, and a plurality of third terminals from which the first signal and the second signal can be output. A second switch circuit has a plurality fourth terminals corresponding to the plurality of third terminals and at which the first or second signal can be received from the first switch circuit, a fifth terminal at which the first signal can be output, and a sixth terminal at which the second signal can be output. Each fourth terminal is connectable to either of the fifth terminal and the sixth terminal.

Abstract: A communication circuit includes a first switch circuit having a first terminal at which a first signal of a first frequency can be input, a second terminal at which a second signal of a second frequency can be input, and a plurality of third terminals from which the first signal and the second signal can be output. A second switch circuit has a plurality fourth terminals corresponding to the plurality of third terminals and at which the first or second signal can be received from the first switch circuit, a fifth terminal at which the first signal can be output, and a sixth terminal at which the second signal can be output. Each fourth terminal is connectable to either of the fifth terminal and the sixth terminal.

Abstract: A semiconductor switch includes a plurality of metal-oxide-semiconductor field effect transistors (MOSFETs) and a pad. The MOSFETs are connected in series between a first node and a second node. The pad is provided above one or more of MOSFETs in the plurality without being provided above other MOSFETs in the plurality. The pad is connected to the first node. A value of an off capacitance (as determined without inclusion of any parasitic capacitance between the pad and the MOSFET) for each the MOSFETs under the pad is smaller than a value of an off capacitance of each of MOSFETs not under than the pad.

Abstract: A switch control circuit includes a plurality of first voltage generation circuits that generate a plurality of second control signals by level-shifting a plurality of first control signals using a reference voltage. A plurality of cut-off circuits controlling whether or not to supply the reference voltage to a corresponding one of the plurality of first voltage generation circuits. A control circuit is configured to control the cut-off circuits in such a manner that the reference voltage supplied to at least one first voltage generation circuit is cut off to the other first voltage generation circuits after a state of the first control signal supplied to the at least one first generation circuit is changed. In some embodiments, the reference voltage to the other first generation circuits is cut-off for a predetermined time period.

Abstract: A semiconductor switch on a SOI substrate that includes a supporting substrate, an insulating layer on the supporting substrate, and a semiconductor layer provided on the insulating layer, includes a first and a second through FET groups, each including a plurality of field effect transistors connected in series between a common node and a first and second node, respectively. The first through FET group has an area equal to or less than an area Sfet, which is calculated by using an equivalent circuit including a resistance that represents leakage of a high frequency signal from the first through FET group to the supporting substrate.

Abstract: A high frequency semiconductor switch has a first terminal, second terminals, a first through FET group, second through FET groups and a shunt FET group. The first through FET group has first field effect transistors connected serially with each other. One end of the first through FET group is connected to the first terminal. Each of the second through FET groups has second field effect transistors connected serially with each other. One end of each of the second through FET groups is connected to each of the second terminals. The other end of each of the second through FET groups is commonly connected to the other end of the first through FET group. The shunt FET group has third field effect transistors connected serially with each other between the second terminal and a ground terminal.

Abstract: A switch control circuit includes a plurality of first voltage generation circuits that generate a plurality of second control signals by level-shifting a plurality of first control signals using a reference voltage. A plurality of cut-off circuits controlling whether or not to supply the reference voltage to a corresponding one of the plurality of first voltage generation circuits. A control circuit is configured to control the cut-off circuits in such a manner that the reference voltage supplied to at least one first voltage generation circuit is cut off to the other first voltage generation circuits after a state of the first control signal supplied to the at least one first generation circuit is changed. In some embodiments, the reference voltage to the other first generation circuits is cut-off for a predetermined time period.

Abstract: A semiconductor switch includes a plurality of metal-oxide-semiconductor field effect transistors (MOSFETs) and a pad. The MOSFETs are connected in series between a first node and a second node. The pad is provided above one or more of MOSFETs in the plurality without being provided above other MOSFETs in the plurality. The pad is connected to the first node. A value of an off capacitance (as determined without inclusion of any parasitic capacitance between the pad and the MOSFET) for each the MOSFETs under the pad is smaller than a value of an off capacitance of each of MOSFETs not under than the pad.

Abstract: A high frequency semiconductor switch has a first terminal, second terminals, a first through FET group, second through FET groups and a shunt FET group. The first through FET group has first field effect transistors connected serially with each other. One end of the first through FET group is connected to the first terminal. Each of the second through FET groups has second field effect transistors connected serially with each other. One end of each of the second through FET groups is connected to each of the second terminals. The other end of each of the second through FET groups is commonly connected to the other end of the first through FET group. The shunt FET group has third field effect transistors connected serially with each other between the second terminal and a ground terminal.

Abstract: A high frequency semiconductor switch has a first terminal, second terminals, a first through FET group, second through FET groups and a shunt FET group. The first through FET group has first field effect transistors connected serially with each other. One end of the first through FET group is connected to the first terminal. Each of the second through FET groups has second field effect transistors connected serially with each other. One end of each of the second through FET groups is connected to each of the second terminals. The other end of each of the second through FET groups is commonly connected to the other end of the first through FET group. The shunt FET group has third field effect transistors connected serially with each other between the second terminal and a ground terminal.

Abstract: A semiconductor switch on a SOI substrate that includes a supporting substrate, an insulating layer on the supporting substrate, and a semiconductor layer provided on the insulating layer, includes a first and a second through FET groups, each including a plurality of field effect transistors connected in series between a common node and a first and second node, respectively. The first through FET group has an area equal to or less than an area Sfet, which is calculated by using an equivalent circuit including a resistance that represents leakage of a high frequency signal from the first through FET group to the supporting substrate.

Abstract: According to one embodiment, a semiconductor switch includes a voltage generator, a voltage controller, a driver, and a switch unit. The voltage generator generates a negative first potential. The voltage controller controls the first potential according to a terminal switch signal input from an outside. The driver is input the terminal switch signal, and outputs at least one selected from the first potential and the second potential based on the terminal switch signal. The second potential is a power supply voltage or is higher than the power supply voltage. The switch unit is provided on an SOT substrate, switches a connection between an antenna terminal and any one of high frequency terminals based on the output of the driver.

Abstract: A high frequency semiconductor switch has a first terminal, second terminals, a first through FET group, second through FET groups and a shunt FET group. The first through FET group has first field effect transistors connected serially with each other. One end of the first through FET group is connected to the first terminal. Each of the second through FET groups has second field effect transistors connected serially with each other. One end of each of the second through FET groups is connected to each of the second terminals. The other end of each of the second through FET groups is commonly connected to the other end of the first through FET group. The shunt FET group has third field effect transistors connected serially with each other between the second terminal and a ground terminal.

Abstract: According to one embodiment, a semiconductor switch includes a plurality of first switch elements, a second switch element, and a controller. The plurality of first switch elements are connected between a common terminal and each of a plurality of radio frequency terminals including a first terminal and a second terminal. The second switch element is connected between the first terminal and a ground terminal. The controller is configured to output a control signal to turn on or off the plurality of first switch elements and the second switch element and perform a normal operation mode to connect the common terminal to any one of the plurality of radio frequency terminals and a test mode to connect the common terminal to the first terminal, the second terminal, and the ground terminal according to a terminal switching signal.

Abstract: According to one embodiment, a semiconductor switch includes a voltage generator, a voltage controller, a driver, and a switch unit. The voltage generator generates a negative first potential. The voltage controller controls the first potential according to a terminal switch signal input from an outside. The driver is input the terminal switch signal, and outputs at least one selected from the first potential and the second potential based on the terminal switch signal. The second potential is a power supply voltage or is higher than the power supply voltage. The switch unit is provided on an SOT substrate, switches a connection between an anntena terminal and any one of high frequency terminals based on the output of the driver.