Patents by Inventor Yuh-Kuang Tseng
Yuh-Kuang Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090180224Abstract: An ESD protection circuit with low capacitance, which utilizes ESD protection design for low capacitance specification, includes: an ESD detection circuit, coupled between a first voltage source and a second voltage source, for detecting an ESD voltage to generate a trigger signal; and an ESD protection device, having an end coupled to one of the first voltage source and the second voltage source, and another end coupled to a pad, wherein the ESD protection device performs an ESD protection according to the trigger signal.Type: ApplicationFiled: January 15, 2008Publication date: July 16, 2009Inventors: Ming-Dou Ker, Chun Huang, Yuh-Kuang Tseng
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Patent number: 7479698Abstract: The present invention discloses a bonding pad structure disposed in a semiconductor device and a method for forming the bonding pad structure. The semiconductor device includes a substrate. The bonding pad structure includes a connection structure and an induction structure. The connection structure allows for a direct connection with a bonding wire. The induction structure is coupled with the connection structure and lowers an effective capacitance between the bonding wire and the substrate.Type: GrantFiled: May 24, 2007Date of Patent: January 20, 2009Assignee: Faraday Technology Corp.Inventors: Ming-Dou Ker, Yuan-Wen Hsiao, Yuh-Kuang Tseng
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Publication number: 20080290457Abstract: The present invention discloses a bonding pad structure disposed in a semiconductor device and a method for forming the bonding pad structure. The semiconductor device includes a substrate. The bonding pad structure includes a connection structure and an induction structure. The connection structure allows for a direct connection with a bonding wire. The induction structure is coupled with the connection structure and lowers an effective capacitance between the bonding wire and the substrate.Type: ApplicationFiled: May 24, 2007Publication date: November 27, 2008Inventors: Ming-Dou Ker, Yuan-Wen Hsiao, Yuh-Kuang Tseng
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Patent number: 7378880Abstract: A frequency comparator comparing frequencies of a first clock signal and a reference clock signal. The frequency comparator includes a phase-frequency detector and a comparison module. The phase-frequency detector receives the first clock signal and the reference clock signal, and outputs an up clock signal and a down clock signal. The pulse-width difference between the up clock signal and the down clock signal corresponds to the phase difference between the first clock signal and the reference clock signal. The comparison module compares the frequencies of the first clock signal and the reference clock signal based on how many times the pulse width of the up clock signal is larger or shorter than that of the down clock signal in a predetermined period.Type: GrantFiled: May 2, 2006Date of Patent: May 27, 2008Assignee: Faraday Technology Corp.Inventors: Song-Rong Han, Yuh-Kuang Tseng
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Publication number: 20070257709Abstract: A frequency comparator is disclosed, comparing frequencies of a first clock signal and a reference clock signal, comprising a phase-frequency detector and a comparison module. The phase-frequency detector receives the first clock signal and the reference clock signal, outputting an up clock signal and a down clock signal, wherein the pulse-width difference between the up clock signal and the down clock signal corresponds to the phase difference between the first clock signal and the reference clock signal. The comparison module compares the frequencies of the first clock signal and the reference clock signal based on how many times the pulse width of the up clock signal is larger or shorter than that of the down clock signal in a predetermined period.Type: ApplicationFiled: May 2, 2006Publication date: November 8, 2007Applicant: Faraday Technology Corp.Inventors: Song-Rong Han, Yuh-Kuang Tseng
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Patent number: 7170329Abstract: A hysteresis current comparator includes a first current comparison unit, a second current comparison unit, and a control circuit connected to the two current comparison units. The first current comparison unit compares a first reference current with an input current and outputs a first voltage accordingly. The second current comparison unit compares a second reference current with the input current and outputs a second voltage accordingly. The control circuit generates an output voltage according to the voltages output by the two current comparison units, or generates an output voltage according to the voltages output by the two current comparison units and the output voltage of the control circuit at a former state.Type: GrantFiled: November 23, 2004Date of Patent: January 30, 2007Assignee: Faraday Technology Corp.Inventors: Yuh-Kuang Tseng, Ming-Shih Yu
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Publication number: 20060267659Abstract: A high-speed low-noise voltage-controlled delay cell is disclosed. The source of a first and a second transistor are coupled to a first voltage wire. The drains of first and third transistor coupling the gates of second and fourth transistor output a second output signal. The drains of second and fourth transistor coupling the gates of firth and third transistor output a first output signal. The sources of second and fourth transistor are coupled to a second voltage wire. The output ends of first and third converter are coupled to the drain of the first transistor. The output ends of second and fourth converter are coupled to the drain of the second transistor. The input ends of first and second converter receive a first and a second input signal, respectively. The input ends of third and fourth converter receive a control voltage.Type: ApplicationFiled: May 26, 2005Publication date: November 30, 2006Inventors: Jiu-Liang Tsai, Yuh-Kuang Tseng
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Publication number: 20060109041Abstract: A hysteresis current comparator includes a first current comparison unit, a second current comparison unit, and a control circuit connected to the two current comparison units. The first current comparison unit compares a first reference current with an input current and outputs a first voltage accordingly. The second current comparison unit compares a second reference current with the input current and outputs a second voltage accordingly. The control circuit generates an output voltage according to the voltages output by the two current comparison units, or generates an output voltage according to the voltages output by the two current comparison units and the output voltage of the control circuit at a former state.Type: ApplicationFiled: November 23, 2004Publication date: May 25, 2006Inventors: Yuh-Kuang Tseng, Ming-Shih Yu
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Patent number: 7015725Abstract: A delay-locked loop device capable of anti-false-locking includes a voltage control delay circuit including a plurality of delay units in a series for generating a delayed phase according to a reference phase and a control voltage; a phase detector coupling to the voltage control delay circuit for generating a control signal according to a lock indication signal, the reference phase, and the delayed phase; a charge pump coupling to the phase detector for generating the control voltage to the voltage control delay circuit according to the control signal; and a lock detector coupling to the voltage control delay circuit for generating the lock indication signal for the phase detector according to output phases of each delay unit of the voltage control delay circuit.Type: GrantFiled: December 6, 2004Date of Patent: March 21, 2006Assignee: Faraday Technology Corp.Inventors: Ming-Shih Yu, Yuh-Kuang Tseng
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Patent number: 6340920Abstract: An oscillator is provided with an inverter, a quartz crystal, a voltage source, an upper clamper, a ground node, a lower clamper, and a feedback-controlled switch. The inverter is connected in parallel to the quartz crystal having a crystal input and a crystal output. The upper damper is connected between the inverter and the voltage source. The lower damper is connected between the inverter and the ground node. The feedback-controlled switch has a pair of switch control nodes connected to the crystal input, a switch input connected to the crystal output, and a switch output connected to the upper damper and the lower clamper. The potential at the switch output is determined by voltage levels at the switch control nodes and the switch input in order to control the upper damper and the lower damper while oscillating.Type: GrantFiled: April 12, 2000Date of Patent: January 22, 2002Assignee: Industrial Technology ResearchInventor: Yuh-Kuang Tseng