Abstract: A device can receive a request to deploy a container to provide a service. The request can include information identifying a set of parameters associated with the container. The device can validate the request using the information identifying the set of parameters. The device can deploy the container on a back-end host. The back-end host can lack connectivity to an external network. The device can receive a first indication that the container was successfully deployed on the back-end host. The device can deploy a proxy container on a front-end host. The front-end host can have connectivity to the external network. The device can receive a second indication that the proxy container was successfully deployed on the front-end host. The device can provide a third indication. The third indication can indicate that the container was successfully deployed.

Abstract: A virtual reality system is described herein. The virtual reality system includes a cane controller and a computing system. The cane controller comprises a rod, a sensor, and a brake mechanism, wherein the sensor is configured to generate a signal that is indicative of position, direction of movement, and velocity of the rod, and wherein the brake mechanism is configured to apply a force to the rod. The computing system receives the signal, computes a position, direction of movement, and velocity of a virtual rod in a virtual space, and outputs a control signal to the brake mechanism based upon such computation. The brake mechanism applies the force to the rod in a direction and with a magnitude indicated in the control signal, thereby preventing the user from causing the virtual rod to penetrate a virtual barrier in the virtual space.

Abstract: In one embodiment, a method includes capturing one or more images of a physical environment surrounding the first user; determining that one or more of the images comprises a face; generating a facial image by cropping a region of the image comprising the face; sending instructions to perform facial recognition on the facial image; receiving a name associated with a second user of the online social network, wherein the face is associated with the second user, wherein the first user is represented by a first node on a social graph maintained by the social-networking system and the second user is represented by a second node on the social graph, and the first node and the second node are connected by at least one edge; and providing an audible indication of the name associated with the second user.

Abstract: A first container of a first device can receive information that identifies a configuration of a first interface and a second interface of a second container of the first device. The first container can include a self-contained execution environment. The first container can configure a firewall of the first device to enable network traffic to be transferred between a second device and a third container of a third device via the first interface and the second interface.

Abstract: A device can receive a request to deploy a container to provide a service. The request can include information identifying a set of parameters associated with the container. The device can validate the request using the information identifying the set of parameters. The device can deploy the container on a back-end host. The back-end host can lack connectivity to an external network. The device can receive a first indication that the container was successfully deployed on the back-end host. The device can deploy a proxy container on a front-end host. The front-end host can have connectivity to the external network. The device can receive a second indication that the proxy container was successfully deployed on the front-end host. The device can provide a third indication. The third indication can indicate that the container was successfully deployed.

Abstract: A device can determine that a container is deployed in a front-end of a private network. The container can include a self-contained execution environment. The container can include an interface that is configured for directing network traffic between the front-end of the private network and one or more applications operating in a back-end of the private network. The device can configure an interface of the container for directing network traffic between an external network and the container. The device can configure a firewall of the front-end of the private network to permit routing of network traffic between the external network and the container. The device can advertise a route for directing network traffic between the external network and the container. The device can perform routing of network traffic between the one or more applications operating in the back-end of the private network and the external network using the container.

Abstract: The present invention provides an image sensor comprising a pixel array module composed of pixel groups, multiple switch control modules, a PFA, a pipelined ADC and a decode module. Each pixel group comprises multiple unit pixels which form at least one unit pixel. Each switch control module corresponds to a row of the pixel array module and includes a first transmission circuit and a second transmission circuit. The PGA process the data outputted by the first and second transmission circuits and the pipelined ADC performs A/D conversion to the data outputted by the PGA. The decode module controls the first and second transmission circuits of each row to alternately read and transmit the unit pixel data, and controls all the first and second transmission circuits to successively output the data of the unit pixels readout thereby to the PGA.

Abstract: In one embodiment, a method includes capturing one or more images of a physical environment surrounding the first user; determining that one or more of the images comprises a face; generating a facial image by cropping a region of the image comprising the face; sending instructions to perform facial recognition on the facial image; receiving a name associated with a second user of the online social network, wherein the face is associated with the second user, wherein the first user is represented by a first node on a social graph maintained by the social-networking system and the second user is represented by a second node on the social graph, and the first node and the second node are connected by at least one edge; and providing an audible indication of the name associated with the second user.

Abstract: A capacitive silicon microphone comprises: a first dielectric layer sets on a substrate with a back cavity, a lower polar plate which is located over the back cavity, a first elastic member of which an inner edge is connected with the edge of the lower polar plate and an outer edge is located on the upper surface of the first dielectric layer, a second dielectric layer which is located on the outer edge of the first elastic member and right above the first dielectric layer, an upper polar plate which has a plurality of release holes and is formed above the lower polar plate with an air gap in between, a second elastic member of which an inner edge is connected with the edge of the upper polar plate and an outer edge is located on the upper surface of the second dielectric layer.

Abstract: The present invention provides an image sensor comprising a pixel array module composed of pixel groups, multiple switch control modules, a PFA, a pipelined ADC and a decode module. Each pixel group comprises multiple unit pixels which form at least one unit pixel. Each switch control module corresponds to a row of the pixel array module and includes a first transmission circuit and a second transmission circuit. The PGA process the data outputted by the first and second transmission circuits and the pipelined ADC performs A/D conversion to the data outputted by the PGA. The decode module controls the first and second transmission circuits of each row to alternately read and transmit the unit pixel data, and controls all the first and second transmission circuits to successively output the data of the unit pixels readout thereby to the PGA.

Abstract: A method is provided for designing an IC chip. The method includes receiving data from a pre-layout design process for the IC chip, routing a plurality of interconnecting wires to connect various devices of the IC chip, and extracting various circuit parameters. The method also includes simulating the IC chip using the extracted various circuit parameters to detect logic or timing error in the IC chip. The extracting the various circuit parameters includes establishing a statistical interconnect technology profile (ITP) file containing at least interconnect parasitic parameters based on correlations of interconnect layer geometric parameter variations.

Abstract: A capacitive silicon microphone comprises: a first dielectric layer sets on a substrate with a back cavity, a lower polar plate which is located over the back cavity, a first elastic member of which an inner edge is connected with the edge of the lower polar plate and an outer edge is located on the upper surface of the first dielectric layer, a second dielectric layer which is located on the outer edge of the first elastic member and right above the first dielectric layer, an upper polar plate which has a plurality of release holes and is formed above the lower polar plate with an air gap in between, a second elastic member of which an inner edge is connected with the edge of the upper polar plate and an outer edge is located on the upper surface of the second dielectric layer.

Abstract: The present invention relates to an interconnection structure and a method for fabricating the same. According to the present invention, cavities are formed between the interconnection dielectric by using a sacrificial layer, carbon nanotubes are used as the interconnection material for local interconnection between via holes, graphene nanoribbons are used as the interconnection material for metal lines, and cavities are included in the interconnection dielectric. In addition, the conventional CMOS BEOL Cu interconnection technique is applied to the intermediate interconnection level and the global interconnection level. In this way, the high parasitic resistance and parasitic capacitance in the Cu interconnection technique, which may occur when the local interconnection is relatively small in size, can be effectively overcome.

Abstract: A pixel structure of a CMOS image sensor pixel structure and a manufacturing method thereof. The structure comprises a photosensitive element (37) and a multi-layer structure of a standard CMOS device arranged on the silicon substrate (31). A deep groove (38) having a light-transmitting space therein is formed above the photosensitive element, a side wall of the deep groove is surrounded by a light reflection shielding layer (39) continuously arranged in a longitudinal direction to reflect the light incident on the light reflection shielding layer. The side wall of the deep groove is surrounded by metal interconnects, vias, contact holes and polysilicon in annular configurations, thus the incident light on the deep grove is substantially completely reflected, which avoids the optical crosstalk and effectively improves the optical resolution and sensitivity of the pixel and the performance and reliability of the chip.

Abstract: A method is disclosed for manufacturing a semiconductor device with a copper interconnect structure. The method includes providing a substrate, forming a first interconnect dielectric layer on the substrate, and forming a second interconnect dielectric layer on a surface of the first interconnect dielectric layer. The method also includes forming a plurality of conduits extending through the first interconnect dielectric layer and the second interconnect dielectric layer, and depositing copper in the plurality of conduits to form a copper interconnect layer of the copper interconnect structure. Further, the first interconnect dielectric layer, between neighboring conduits, contains cavities such that dielectric constant of the first interconnect dielectric layer is reduced. The second interconnect dielectric layer seals the top of the cavities, the substrate is the bottom of the cavities, and a width of the top of the cavities is less than a width of the bottom of the cavities.

Abstract: A pixel structure of a CMOS image sensor pixel structure and a manufacturing method thereof. The structure comprises a photosensitive element (37) and a multi-layer structure of a standard CMOS device arranged on the silicon substrate (31). A deep groove (38) having a light-transmitting space therein is formed above the photosensitive element, a side wall of the deep groove is surrounded by a light reflection shielding layer (39) continuously arranged in a longitudinal direction to reflect the light incident on the light reflection shielding layer. The side wall of the deep groove is surrounded by metal interconnects, vias, contact holes and polysilicon in annular configurations, thus the incident light on the deep grove is substantially completely reflected, which avoids the optical crosstalk and effectively improves the optical resolution and sensitivity of the pixel and the performance and reliability of the chip.

Abstract: A method is provided for designing an IC chip. The method includes receiving data from a pre-layout design process for the IC chip, routing a plurality of interconnecting wires to connect various devices of the IC chip, and extracting various circuit parameters. The method also includes simulating the IC chip using the extracted various circuit parameters to detect logic or timing error in the IC chip. The extracting the various circuit parameters includes establishing a statistical interconnect technology profile (ITP) file containing at least interconnect parasitic parameters based on correlations of interconnect layer geometric parameter variations.

Abstract: The present invention provides a multi-system multi-band RFID antenna, which comprises an on-chip antenna and at least one external antenna, wherein the on-chip antenna is arranged on RFID chip; the external antennas are arranged outside the RFID chip; and the RFID chip is provided with connection pads on the outer surface, wherein both the on-chip antenna and the external antennas are connected with the RFID chip through the connection pads. According to the multi-system multi-band RFID antenna of the present invention, the RFID chip can provide appropriate antennas for applications in different systems with different frequency bands, and can satisfactorily meet the need for RFID multi-system integration applications in the future.

Abstract: A method is disclosed for manufacturing a semiconductor device with a copper interconnect structure. The method includes providing a substrate, forming a first interconnect dielectric layer on the substrate, and forming a second interconnect dielectric layer on a surface of the first interconnect dielectric layer. The method also includes forming a plurality of conduits extending through the first interconnect dielectric layer and the second interconnect dielectric layer, and depositing copper in the plurality of conduits to form a copper interconnect layer of the copper interconnect structure. Further, the first interconnect dielectric layer, between neighboring conduits, contains cavities such that dielectric constant of the first interconnect dielectric layer is reduced. The second interconnect dielectric layer seals the top of the cavities, the substrate is the bottom of the cavities, and a width of the top of the cavities is less than a width of the bottom of the cavities.

Abstract: The present invention relates to an interconnection structure and a method for fabricating the same. According to the present invention, cavities are formed between the interconnection dielectric by using a sacrificial layer, carbon nanotubes are used as the interconnection material for local interconnection between via holes, graphene nanoribbons are used as the interconnection material for metal lines, and cavities are included in the interconnection dielectric. In addition, the conventional CMOS BEOL Cu interconnection technique is applied to the intermediate interconnection level and the global interconnection level. In this way, the high parasitic resistance and parasitic capacitance in the Cu interconnection technique, which may occur when the local interconnection is relatively small in size, can be effectively overcome.