Patents by Inventor Yuhei NISHIDA
Yuhei NISHIDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240088796Abstract: Provided is a semiconductor module, including: a first switching device provided in one of an upper arm or a lower arm; a second switching device provided in another of the upper arm or the lower arm; a first diode device provided in parallel with the first switching device; a second diode device provided in parallel with the second switching device; a laminated substrate of which a main surface has two sides extending in a predetermined first direction and a predetermined second direction; and a gate external terminal and an auxiliary source external terminal provided farther toward a negative side of the first direction than the upper arm and the lower arm, and arranged in the second direction.Type: ApplicationFiled: November 16, 2023Publication date: March 14, 2024Inventors: Yuhei NISHIDA, Mayumi SHIOHARA
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Patent number: 11749581Abstract: Provided are a semiconductor module in which bonding properties between an insulated substrate and a sealing resin is improved and a method for manufacturing the semiconductor module. A semiconductor module 50 is provided with: an insulated substrate 23; a circuit pattern 24 that is formed on the insulated substrate; semiconductor elements 25, 26 that are joined on the circuit pattern; and a sealing resin 28 for sealing the insulated substrate, the circuit pattern, and the semiconductor elements. The surface 23a of the insulated substrate in a part where the insulative substrate and the sealing resin are bonded to each other, is characterized in that, in a cross section of the insulated substrate, the average roughness derived in a 300-?m wide range is 0.15 ?m or greater and the average roughness derived in a 3-?m-wide range is 0.02 ?m or greater.Type: GrantFiled: February 6, 2019Date of Patent: September 5, 2023Assignees: FUJI ELECTRIC CO., LTD., DOWA METAL TECH CO., LTD.Inventors: Yuhei Nishida, Fumihiko Momose, Takashi Ideno, Yukihiro Kitamura
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Patent number: 11552021Abstract: A semiconductor device includes: a first insulating circuit substrate; a first semiconductor chip mounted on a top surface of the first insulating circuit substrate; a printed circuit board arranged over the first insulating circuit substrate; a first external terminal inserted to the printed circuit board and having one end bonded to the top surface of the first insulating circuit substrate; and a first pin inserted to the printed circuit board and having one end bonded to a top surface of the first semiconductor chip, wherein the first insulating circuit substrate and the printed circuit board having warps complimentary to each other.Type: GrantFiled: November 10, 2020Date of Patent: January 10, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventor: Yuhei Nishida
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Publication number: 20220375818Abstract: A semiconductor device has a resistance element including a metal block, a resin layer disposed on the metal block, and a resistance film disposed on the resin layer and an insulated circuit board including an insulating plate and a circuit pattern disposed on the insulating plate and having a bonding area on a front surface thereof to which a back surface of the metal block of the resistance element is bonded. The area of the circuit pattern is larger in plan view than that of a front surface of the resistance element. The metal block has a thickness greater than that of the circuit pattern in a direction orthogonal to the back surface of the metal block. As a result, the metal block properly conducts heat generated by the resistance film of the resistance element to the circuit pattern.Type: ApplicationFiled: May 17, 2022Publication date: November 24, 2022Applicant: FUJI ELECTRIC CO., LTD.Inventor: Yuhei NISHIDA
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Patent number: 11037848Abstract: A semiconductor module includes block-shaped first and second lower base members provided by bonding of flat lower surfaces on an insulated circuit board and having bottomed first and second hole portions open in upper surfaces in upper portions of the first and second lower base members, tubular first and second upper slide support members inserted in the first and second hole portions in a state where at least a part of outside surfaces is in contact with inside walls of the first and second hole portions, first and second pins inserted in contact with the insides of the first and second upper slide support members, and a sealing resin sealing the first and second pins except for the upper portions of the first and second pins.Type: GrantFiled: November 28, 2018Date of Patent: June 15, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yuhei Nishida, Tatsuo Nishizawa
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Publication number: 20210151378Abstract: A semiconductor device includes: a first insulating circuit substrate; a first semiconductor chip mounted on a top surface of the first insulating circuit substrate; a printed circuit board arranged over the first insulating circuit substrate; a first external terminal inserted to the printed circuit board and having one end bonded to the top surface of the first insulating circuit substrate; and a first pin inserted to the printed circuit board and having one end bonded to a top surface of the first semiconductor chip, wherein the first insulating circuit substrate and the printed circuit board having warps complimentary to each other.Type: ApplicationFiled: November 10, 2020Publication date: May 20, 2021Applicant: FUJI ELECTRIC CO., LTD.Inventor: Yuhei NISHIDA
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Patent number: 10937727Abstract: A semiconductor module includes a metal plate; a solder applied on the metal plate; a component-to-be-bonded mounted on the solder; and a linear guide portion delineated along a circumference of the component-to-be-bonded on a top surface of the metal plate, and including a metal surface having greater surface roughness than a peripheral region.Type: GrantFiled: March 22, 2019Date of Patent: March 2, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventor: Yuhei Nishida
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Publication number: 20200388553Abstract: Provided are a semiconductor module in which bonding properties between an insulated substrate and a sealing resin is improved and a method for manufacturing the semiconductor module. A semiconductor module 50 is provided with: an insulated substrate 23; a circuit pattern 24 that is formed on the insulated substrate; semiconductor elements 25, 26 that are joined on the circuit pattern; and a sealing resin 28 for sealing the insulated substrate, the circuit pattern, and the semiconductor elements. The surface 23a of the insulated substrate in a part where the insulative substrate and the sealing resin are bonded to each other, is characterized in that, in a cross section of the insulated substrate, the average roughness derived in a 300-?m wide range is 0.15 ?m or greater and the average roughness derived in a 3-?m-wide range is 0.02 ?m or greater.Type: ApplicationFiled: February 6, 2019Publication date: December 10, 2020Inventors: Yuhei NISHIDA, Fumihiko MOMOSE, Takashi IDENO, Yukihiro KITAMURA
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Publication number: 20190341345Abstract: A semiconductor module includes a metal plate; a solder applied on the metal plate; a component-to-be-bonded mounted on the solder; and a linear guide portion delineated along a circumference of the component-to-be-bonded on a top surface of the metal plate, and including a metal surface having greater surface roughness than a peripheral region.Type: ApplicationFiled: March 22, 2019Publication date: November 7, 2019Applicant: FUJI ELECTRIC CO., LTD.Inventor: Yuhei NISHIDA
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Publication number: 20190189529Abstract: A semiconductor module includes block-shaped first and second lower base members provided by bonding of flat lower surfaces on an insulated circuit board and having bottomed first and second hole portions open in upper surfaces in upper portions of the first and second lower base members, tubular first and second upper slide support members inserted in the first and second hole portions in a state where at least a part of outside surfaces is in contact with inside walls of the first and second hole portions, first and second pins inserted in contact with the insides of the first and second upper slide support members, and a sealing resin sealing the first and second pins except for the upper portions of the first and second pins.Type: ApplicationFiled: November 28, 2018Publication date: June 20, 2019Applicant: FUJI ELECTRIC CO., LTD.Inventors: Yuhei NISHIDA, Tatsuo NISHIZAWA
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Patent number: 9824950Abstract: A semiconductor device according to the invention includes an insulating substrate including an insulating plate, a circuit pattern that is formed on a front surface of the insulating plate, and a radiator plate that is fixed to a rear surface of the insulating plate, a semiconductor chip that is fixed to the circuit pattern, an external lead terminal that is connected to a surface electrode of the semiconductor chip through a wiring line, a molding resin that covers the insulating substrate, the semiconductor chip, the wiring line, and the external lead terminal such that a rear surface of the radiator plate and a portion of the external lead terminal are exposed, and an anchor layer including a stripe-shaped concave portion which is formed in the circuit pattern by laser beam irradiation.Type: GrantFiled: March 12, 2015Date of Patent: November 21, 2017Assignee: FUJI ELECTRIC CO., LTD.Inventors: Kyohei Fukuda, Tatsuo Nishizawa, Yuhei Nishida, Eiji Mochizuki
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Patent number: 9711430Abstract: A semiconductor device is fastened to a heat dissipation member such that a force directed downward acts from a metal substrate onto the heat dissipation member, with a rim portion of a storage region as a fulcrum with respect to the heat dissipation member. As a result, a heat conductive material can be spread into a thinner layer between the metal substrate and the heat dissipation member, improving the heat dissipation between the metal substrate and the heat dissipation member.Type: GrantFiled: September 11, 2014Date of Patent: July 18, 2017Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yuhei Nishida, Tatsuo Nishizawa
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Patent number: 9299642Abstract: A semiconductor device includes a frame including a first step portion provided in a ring shape in an inner circumference of one main surface of the frame, a second step portion provided in a ring shape in an inner circumference of another main surface of the frame, and an inner wall provided between the first step portion and the second step portion; a terminal leading from the first step portion to outside; a circuit board fitted to the second step portion; and an adhesive resin bonding the second step portion and the circuit board, and contacting the inner wall and the terminal.Type: GrantFiled: September 1, 2015Date of Patent: March 29, 2016Assignee: FUJI ELECTRIC CO., LTD.Inventors: Yuhei Nishida, Tatsuo Nishizawa, Masanori Tanaka
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Publication number: 20150371931Abstract: A semiconductor device includes a frame including a first step portion provided in a ring shape in an inner circumference of one main surface of the frame, a second step portion provided in a ring shape in an inner circumference of another main surface of the frame, and an inner wall provided between the first step portion and the second step portion; a terminal leading from the first step portion to outside; a circuit board fitted to the second step portion; and an adhesive resin bonding the second step portion and the circuit board, and contacting the inner wall and the terminal.Type: ApplicationFiled: September 1, 2015Publication date: December 24, 2015Inventors: Yuhei NISHIDA, Tatsuo NISHIZAWA, Masanori TANAKA
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Publication number: 20150187671Abstract: A semiconductor device according to the invention includes an insulating substrate including an insulating plate, a circuit pattern that is formed on a front surface of the insulating plate, and a radiator plate that is fixed to a rear surface of the insulating plate, a semiconductor chip that is fixed to the circuit pattern, an external lead terminal that is connected to a surface electrode of the semiconductor chip through a wiring line, a molding resin that covers the insulating substrate, the semiconductor chip, the wiring line, and the external lead terminal such that a rear surface of the radiator plate and a portion of the external lead terminal are exposed, and an anchor layer including a stripe-shaped concave portion which is formed in the circuit pattern by laser beam irradiation.Type: ApplicationFiled: March 12, 2015Publication date: July 2, 2015Inventors: Kyohei FUKUDA, Tatsuo NISHIZAWA, Yuhei NISHIDA, Eiji MOCHIZUKI
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Publication number: 20140374896Abstract: A semiconductor device is fastened to a heat dissipation member such that a force directed downward acts from a metal substrate onto the heat dissipation member, with a rim portion of a storage region as a fulcrum with respect to the heat dissipation member. As a result, a heat conductive material can be spread into a thinner layer between the metal substrate and the heat dissipation member, improving the heat dissipation between the metal substrate and the heat dissipation member.Type: ApplicationFiled: September 11, 2014Publication date: December 25, 2014Inventors: Yuhei NISHIDA, Tatsuo NISHIZAWA