Patents by Inventor Yuhko Nishimoto
Yuhko Nishimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7329612Abstract: A semiconductor device is manufactured by the steps of generating a film forming gas by setting a flow rate ratio of H2O to any one of a silicon-contained organic compound having a siloxane bond and a silicon-contained organic compound having a CH3 group to 4 or more and adjusting a gas pressure to 1.5 Torr or more, applying a power to the film forming gas to generate a plasma thereof so as to react it, and thus forming a low-dielectric insulating film (62) on a substrate (61), plasmanizing a process gas containing at least any one of He, Ar, H2 or deuterium, and bringing the low-dielectric insulating film (62) into contact with the plasma of the process gas.Type: GrantFiled: October 20, 2003Date of Patent: February 12, 2008Assignee: Semiconductor Process Laboratory Co., Ltd.Inventors: Yoshimi Shioya, Yuhko Nishimoto, Kazuo Maeda
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Publication number: 20060099725Abstract: A semiconductor device is manufactured by the steps of generating a film forming gas by setting a flow rate ratio of H2O to any one of a silicon-contained organic compound having a siloxane bond and a silicon-contained organic compound having a CH3 group to 4 or more and adjusting a gas pressure to 1.5 Torr or more, applying a power to the film forming gas to generate a plasma thereof so as to react it, and thus forming a low-dielectric insulating film (62) on a substrate (61), plasmanizing a process gas containing at least any one of He, Ar, H2 or deuterium, and bringing the low-dielectric insulating film (62) into contact with the plasma of the process gas.Type: ApplicationFiled: October 20, 2003Publication date: May 11, 2006Inventors: Yoshimi Shioya, Yuhko Nishimoto, Kazuo Maeda
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Patent number: 6815824Abstract: The present invention relates to a semiconductor device in which a barrier insulating film is formed to cover a copper film or a wiring consisting mainly of the copper film. The barrier insulating film is a structure of two or more layers including at least a first barrier insulating film containing silicon, oxygen, nitrogen and hydrogen or silicon, oxygen, nitrogen, hydrogen and carbon, and a second barrier insulating film containing silicon, oxygen and hydrogen or silicon, oxygen, hydrogen and carbon.Type: GrantFiled: June 24, 2002Date of Patent: November 9, 2004Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co. Ld.Inventors: Yoshimi Shioya, Yuhko Nishimoto, Kazuo Maeda, Tomomi Suzuki, Hiroshi Ikakura
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Patent number: 6780790Abstract: A semiconductor device having a barrier insulating film covering a copper wiring is formed by a plasma enhanced CVD method. The method includes supplying high frequency power of a frequency of 1 MHz or more to a first electrode, and holding a substrate on which copper wiring is formed on a second electrode facing the first electrode; supplying a film forming gas containing an alkyl compound and an oxygen-containing gas between the first and second electrodes while regulating gas pressure of the film forming gas to 1 Torr or less; and supplying high frequency power to either of the first and second electrodes to convert the film forming gas into a plasma, and allowing the alkyl compound and the oxygen-containing gas of the film forming gas to react to form a barrier insulating film covering the surface of the substrate.Type: GrantFiled: November 5, 2002Date of Patent: August 24, 2004Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.Inventors: Yoshimi Shioya, Yuhko Nishimoto, Tomomi Suzuki, Kazuo Maeda
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Patent number: 6713383Abstract: A surface of a copper (Cu) wiring layer formed over a semiconductor substrate is exposed to a plasma gas selected from the group consisting of an ammonia gas, a mixed gas of nitrogen and hydrogen, a CF4 gas, a C2F6 gas and a NF3 gas. The surface of the copper (Cu) wiring layer is then exposed to an atmosphere or a plasma of a gas selected from the group consisting of an ammonia gas, an ethylenediamine gas, a fÀ-diketone gas, a mixed gas consisting of the ammonia gas and a hydrocarbon gas (CxHy), and a mixed gas consisting of a nitrogen gas and the hydrocarbon gas (CxHy), and a Cu diffusion preventing insulating film is formed on the copper (Cu) wiring layer.Type: GrantFiled: July 30, 2002Date of Patent: March 30, 2004Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.Inventors: Yoshimi Shioya, Yuhko Nishimoto, Tomomi Suzuki, Shoji Ohgawara, Kazuo Maeda
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Patent number: 6649495Abstract: The present invention relates to a manufacturing method of a semiconductor device in which a barrier insulating film and a main insulating film having low relative dielectric constant are sequentially formed while a wiring mainly consisting of copper film is coated.Type: GrantFiled: June 10, 2002Date of Patent: November 18, 2003Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.Inventors: Yoshimi Shioya, Yuhko Nishimoto, Tomomi Suzuki, Hiroshi Ikakura, Kazuo Maeda
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Publication number: 20030109136Abstract: Disclosed is a method of manufacturing a semiconductor device in which a barrier insulating film covering a copper wiring is formed by a plasma enhanced CVD method. The method comprises the steps of connecting a supply power source for supplying high frequency power of a frequency of 1 MHz or more to a first electrode 2, and holding a substrate 21 on a second electrode 3 facing the first electrode 2, the substrate 21 on which a copper wiring is formed; supplying a film forming gas containing an alkyl compound and an oxygen-containing gas between the first and second electrodes 2, 3, and regulating a gas pressure of the film forming gas to 1 Torr or less; and supplying the high frequency power to any one of the first and second electrodes 2, 3 to convert the film forming gas into a plasma state, and allowing the alkyl compound and the oxygen-containing gas of the film forming gas to react with each other and thus form a barrier insulating film covering the surface of the substrate 21.Type: ApplicationFiled: November 5, 2002Publication date: June 12, 2003Applicant: CANON SALES CO., INC.Inventors: Yoshimi Shioya, Yuhko Nishimoto, Tomomi Suzuki, Kazuo Maeda
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Publication number: 20030042613Abstract: The present invention relates to a semiconductor device in which a barrier insulating film is formed to cover a copper film or a wiring consisting mainly of the copper film. In structure, the barrier insulating film 34a comprises a double-layered structure or more that is provided with at least a first barrier insulating film 34aa containing silicon, oxygen, nitrogen and hydrogen or silicon, oxygen, nitrogen, hydrogen and carbon, and a second barrier insulating film 34ab containing silicon, oxygen and hydrogen or silicon, oxygen, hydrogen and carbon.Type: ApplicationFiled: June 24, 2002Publication date: March 6, 2003Applicant: CANON SALES CO., INC.Inventors: Yoshimi Shioya, Yuhko Nishimoto, Kazuo Maeda, Tomomi Suzuki, Hiroshi Ikakura
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Publication number: 20030045096Abstract: There are provided the steps of exposing a surface of a copper (Cu) wiring layer formed over a semiconductor substrate to a plasma of a gas selected from the group consisting of an ammonia gas, a mixed gas of nitrogen and hydrogen, a CF4 gas, a C2F6 gas and a NF3 gas, exposing the surface of the copper (Cu) wiring layer to an atmosphere or a plasma of a gas selected from the group consisting of an ammonia gas, an ethylenediamine gas, a &bgr;-diketone gas, a mixed gas consisting of the ammonia gas and a hydrocarbon gas (CxHy), and a mixed gas consisting of a nitrogen gas and the hydrocarbon gas (CxHy), and forming a Cu diffusion preventing insulating film on the copper (Cu) wiring layer.Type: ApplicationFiled: July 30, 2002Publication date: March 6, 2003Inventors: Yoshimi Shioya, Yuhko Nishimoto, Tomomi Suzuki, Shoji Ohgawara, Kazuo Maeda
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Publication number: 20030022468Abstract: The present invention relates to a manufacturing method of a semiconductor device in which a barrier insulating film and a main insulating film having low relative dielectric constant are sequentially formed while a wiring mainly consisting of copper film is coated.Type: ApplicationFiled: June 10, 2002Publication date: January 30, 2003Inventors: Yoshimi Shioya, Yuhko Nishimoto, Tomomi Suzuki, Hiroshi Ikakura, Kazuo Maeda
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Patent number: 6352943Abstract: This invention relates to a method of film formation in which, when a silicon oxide film (a NSG film: a Non-doped Silicate Glass) is formed on a substrate having a recess by a CVD method using a mixed gas containing TEOS and ozone, surface dependency on the substrate is eliminated to embed a silicon oxide film into the recess of the surface. The invention includes forming a phosphorus containing insulating film as a base layer on the surface of a substrate and forming a silicon-containing insulating film on the phosphosilicate glass film by the chemical vapor deposition method, using a mixture of a ozone-containing gas and a silicon-containing gas.Type: GrantFiled: September 22, 1998Date of Patent: March 5, 2002Assignee: Semiconductor Process Laboratory Co., Ltd.Inventors: Kazuo Maeda, Yuhko Nishimoto
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Publication number: 20010049202Abstract: This invention relates to a method of film formation in which, when a silicon oxide film (a NSG film: a Non-doped Silicate Glass) is formed on a substrate having a recess by a CVD method using a mixed gas containing a TEOS and ozone, a surface dependency of the substrate is deleted to embed a silicon oxide film into the recess of the surface thereof. The invention comprises a process forming a phosphorus containing insulating film 14 as a base layer on the surface of a substrate 11 and a process forming a silicon-containing insulating film 15 on the phosphosilicate glass film 14 by the chemical vapor deposition method used a mixed gas containing a ozone-containing gas and a silicon-containing gas.Type: ApplicationFiled: September 22, 1998Publication date: December 6, 2001Inventors: KAZUO MAEDA, YUHKO NISHIMOTO
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INTERLAYER INSULATING FILM FORMING METHOD, SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Publication number: 20010023125Abstract: There is disclosed a method of forming stress-adjusted insulating films which are interposed between respective interconnection layers upon laminating metal interconnection layers in excess of three-layer. Multiple layers whose total stress is adjusted are formed by laminating insulating films 22a to 22e, 23a to 23d on a substrate 21.Type: ApplicationFiled: July 21, 1997Publication date: September 20, 2001Inventors: YUHKO NISHIMOTO, KAZUO MAEDA -
Patent number: 6225236Abstract: This invention is directed to a method for reforming an undercoating surface prior to the formation of a film by the CVD technique using a reaction gas containing an ozone-containing gas having ozone contained in oxygen and TEOS. It effects the reform of the surface by forming an undercoating insulating film on a substrate prior to the formation of film and exposing the surface of the undercoating insulating film to plasma gas.Type: GrantFiled: June 11, 1998Date of Patent: May 1, 2001Assignees: Canon Sales Co., Inc., Semiconductor Process Laboratory Co., Ltd.Inventors: Yuhko Nishimoto, Setsu Suzuki
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Patent number: 5858100Abstract: The present invention relates to a reaction apparatus for receiving a reaction gas and for heating a substrate so as to form a film such as an insulating film on the substrate or for etching, with reduced power consumption for heating the substrate. The apparatus can change a substrate temperature within a short period of time, and maintains throughput while reducing labor and cost for maintenance. The apparatus includes a substrate holder (12) with a base of an insulating material in which an electrode (22) and a heater (23) for heating the held substrate (20) are contained. The apparatus also includes a processing chamber (7) enclosed by a chamber wall (7a).Type: GrantFiled: April 4, 1995Date of Patent: January 12, 1999Assignees: Semiconductor Process Co., Ltd., Canon Sales Co., Inc., Alcan-Tech Co., Inc.Inventors: Kazuo Maeda, Kouichi Ohira, Yuhko Nishimoto
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Patent number: 5620523Abstract: This invention relates to film-forming apparatus for forming an insulating film, for example, by the CVD method using an activated reaction gas. It is aimed at simplifying the apparatus, ensuring high film quality, enhancing the efficiency of formation of a plasma, and improving the uniformity of thickness of the produced film. The film-forming apparatus includes a plasma generator and a first gas discharger for discharging a first reaction gas into the plasma generator and a second gas discharger for discharging a second reaction gas onto a substrate. The second gas discharger includes a plurality of gas discharge pipes, in each of which a plurality of gas discharge holes are formed, whereby the second reaction gas is discharged from the gas discharge holes into contact with the activated first reaction gas and is itself activated so that a film is formed on the substrate through reaction of first and second reaction gases.Type: GrantFiled: February 16, 1995Date of Patent: April 15, 1997Assignees: Canon Sales Co., Inc., Alcan-Tech Co., Inc., Semiconductor Process Laboratory Co., Ltd.Inventors: Kazuo Maeda, Kouichi Ohira, Yuhko Nishimoto
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Patent number: 5314538Abstract: An apparatus and method for manufacturing a semiconductor device capable of forming a single layer film or a multilayer film of improved quality by continuously processing without exposure of the wafer to the ambient air. The apparatus includes a film forming section having a gas dispersion unit for supplying reaction gas, a processing section for processing the formed film and a wafer holder for holding a wafer facing the gas dispersion unit or the processing section. The wafer holder moves the wafer between the film forming section and the processing section while heating the wafer by a heating element contained therein.Type: GrantFiled: December 22, 1992Date of Patent: May 24, 1994Assignees: Semiconductor Process Laboratory, Canon Sales Co., Inc., Alcan Tech Co., Inc.Inventors: Kazuo Maeda, Noboru Tokumasu, Yuhko Nishimoto