Patents by Inventor Yui-Shin Fran

Yui-Shin Fran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8390991
    Abstract: A stacked solid state solid electrolytic capacitor includes a plurality of capacitor units, a substrate unit and a package unit. The substrate unit includes a positive guiding substrate and a negative guiding substrate. The positive guiding substrate has a positive exposed end integrally extended therefrom along a first predetermined direction. The negative guiding substrate has a first negative exposed end integrally extended therefrom along a second predetermined direction, a second negative exposed end integrally extended therefrom along a third predetermined direction, and a third negative exposed end integrally extended therefrom along a fourth predetermined direction. The first, the second, the third and the fourth predetermined directions are different. The capacitor units are stacked on top of one another and disposed on the negative guiding substrate. The package unit encloses the capacitor units, one part of the positive and one part of the negative guiding substrate.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: March 5, 2013
    Assignee: Apaq Technology Co., Ltd.
    Inventors: Chi-Hao Chiu, Yui-Shin Fran, Ching-Feng Lin, Chun-Chia Huang, Chun-Hung Lin, Wen-Yen Huang
  • Patent number: 8305735
    Abstract: A stacked solid electrolytic capacitor with positive multi-pin structure includes a plurality of capacitor units, a substrate unit and a package unit. The positive electrode of each capacitor unit has a positive pin extended outwards therefrom. The positive pins are divided into a plurality of positive pin units that are separated from each other and electrically stacked onto each other. The negative electrode of each capacitor unit has a negative pin extended outwards therefrom. The negative pins are divided into a plurality of negative pin units. The negative pin units are separated from each other and the negative pins of each negative pin unit are electrically stacked onto each other. The substrate unit has a positive guiding substrate electrically connected to the positive pins and a negative guiding substrate electrically connected to the negative pins. The package unit covers the capacitor units and one part of the substrate unit.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: November 6, 2012
    Assignee: Apaq Technology Co., Ltd.
    Inventors: Yui-Shin Fran, Ching-Feng Lin, Chi-Hao Chiu, Chun-Chia Huang, Wen-Yen Huang
  • Publication number: 20110216475
    Abstract: A stacked solid-state electrolytic capacitor with multi-directional product lead frame structure includes a plurality of capacitor units, a substrate unit and a package unit. The capacitor units are stacked onto each other. Each capacitor unit has a positive electrode and a negative electrode, the positive electrode of each capacitor unit has a positive pin extended outwards, the positive pins are electrically stacked onto each other, and the negative electrodes are electrically stacked onto each other. The substrate unit has at least one positive guiding substrate electrically connected to the positive pins of the capacitor units and a plurality of negative guiding substrates electrically connected to the negative electrodes of the capacitor units. The package unit covers the capacitor units and one part of the substrate unit in order to expose an end of the at least one positive guiding substrate and an end of each negative guiding substrate.
    Type: Application
    Filed: July 9, 2010
    Publication date: September 8, 2011
    Applicant: APAQ TECHNOLOGY CO., LTD.
    Inventors: Chi-Hao Chiu, Yui-Shin Fran, Ching-Feng Lin, Chun-Chia Huang, Chun-Hung Lin, Wen-Yen Huang
  • Patent number: 7888880
    Abstract: The configurations of a dielectric barrier discharge lamp (DBDL) system and the driving method thereof are provided in the present invention. The proposed DBDL system includes a driver circuit receiving a DC input voltage and generating an AC output voltage, including a transformer having a primary winding and a secondary winding, a dielectric barrier discharge lamp coupled to the secondary winding and a burst mode dimming circuit including a first switch. In which, the first switch is turned on when the first switch is starting such that the first switch and the primary winding forms a conducting path so as to apply a driving high voltage to the DBDEL and turn off the first switch after the DBDL is breaking through by the driving high voltage such that a driving normal voltage is applied to the DBDL.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: February 15, 2011
    Assignee: Delta Electronics, Inc.
    Inventors: Qiukai Huang, Qingyuan Meng, Jianping Ying, Jin-Chyuan Hung, Yui Shin Fran
  • Publication number: 20110007451
    Abstract: A stacked solid electrolytic capacitor with positive multi-pin structure includes a plurality of capacitor units, a substrate unit and a package unit. The positive electrode of each capacitor unit has a positive pin extended outwards therefrom. The positive pins are divided into a plurality of positive pin units that are separated from each other and electrically stacked onto each other. The negative electrode of each capacitor unit has a negative pin extended outwards therefrom. The negative pins are divided into a plurality of negative pin units. The negative pin units are separated from each other and the negative pins of each negative pin unit are electrically stacked onto each other. The substrate unit has a positive guiding substrate electrically connected to the positive pins and a negative guiding substrate electrically connected to the negative pins. The package unit covers the capacitor units and one part of the substrate unit.
    Type: Application
    Filed: November 30, 2009
    Publication date: January 13, 2011
    Applicant: APAQ TECHNOLOGY CO., LTD.
    Inventors: Yui-Shin Fran, Ching-Feng Lin, Chi-Hao Chiu, Chun-Chia Huang, Wen-Yen Huang
  • Publication number: 20080316166
    Abstract: A method of driving plane light is used in a liquid crystal display. A plane light device includes a first substrate, a frame, a second substrate, a fluorescent layer, a plurality of spacers, and an outer electrode layer. A plane chamber is formed between the first substrate and the second substrate to filling mixed gases therein. The outer electrode layer includes a plurality of independent electrode pairs. The mixed gas is discharged by the fluorescent layer to produce a plurality of corresponding light emitting regions after driving respectively the plurality of electrode pairs. The plurality of light emitting regions have interval lines parallel or perpendicular to scanning lines of the liquid crystal display. The plurality of light emitting regions are opened synchronously, in series or alternately. The image blurry phenomenon displayed in the LCDs will be effectively improved caused by slow response of LCD's cells.
    Type: Application
    Filed: February 4, 2008
    Publication date: December 25, 2008
    Inventors: Jin-Chyuan HUNG, Yung-Hsiang Chao, Yui-Shin Fran, Chun-Hui Tsai
  • Publication number: 20080303448
    Abstract: The configurations of a dielectric barrier discharge lamp (DBDL) system and the driving method thereof are provided in the present invention. The proposed DBDL system includes a driver circuit receiving a DC input voltage and generating an AC output voltage, including a transformer having a primary winding and a secondary winding, a dielectric barrier discharge lamp coupled to the secondary winding and a burst mode dimming circuit including a first switch. In which, the first switch is turned on when the first switch is starting such that the first switch and the primary winding forms a conducting path so as to apply a driving high voltage to the DBDEL and turn off the first switch after the DBDL is breaking through by the driving high voltage such that a driving normal voltage is applied to the DBDL.
    Type: Application
    Filed: October 25, 2007
    Publication date: December 11, 2008
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Qiukai Huang, Qingyuan Meng, Jianping Ying, Jin-Chyuan Hung, Yui Shin Fran
  • Publication number: 20070228994
    Abstract: Disclosed is a driving circuit and method for a fluorescent lamp. The driving circuit comprises a power factor correction (PFC) stage, a startup stage, an isolation stage, a square-wave driving stage and an output stage. The PFC stage receives and converts an input alternating current (AC) voltage into a direct current (DC) voltage. The startup stage receives the DC voltage and adjusts the DC voltage into an operating voltage. The startup stage is connected in parallel with the square-wave driving stage. The square-wave driving stage is connected to the isolation stage and converts the operating voltage into a boosted square-wave voltage, and the output stage receives the boosted square-wave voltage to ignite the fluorescent lamp. As such, the fluorescent lamp may be rapidly and properly ignited.
    Type: Application
    Filed: October 17, 2006
    Publication date: October 4, 2007
    Applicant: Delta Optoelectronics, Inc.
    Inventors: Jin-Chyuan Hung, Qiu-Kai Huang, Jia-Ping Ying, Yui-Shin Fran, Chang-Chun Hsiao
  • Patent number: 7250716
    Abstract: A cold cathode flat fluorescent lamp (CCFFL) comprising a flat lamp chamber, fluorescent substance, discharge gas, and a patterned electrode is provided. The discharge gas is disposed in the gas discharge chamber. The fluorescent substance is disposed over the inner wall of the gas discharge chamber. The patterned electrode is disposed over a surface of the flat lamp chamber. In an embodiment, the patterned electrode comprises anode pairs and cathode pairs which are alternately arranged. Each anode pair comprises a first meandering anode with first protrusions and a second meandering anode with second protrusions, wherein the first protrusions and the second protrusions are staggered. Each cathode pair comprises a first meandering cathode with third protrusions and a second meandering cathode with fourth protrusions, wherein each third protrusion aligns with each second protrusion, and each fourth protrusion aligns with each first protrusion.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: July 31, 2007
    Assignee: Delta Optoelectronics, Inc.
    Inventors: Yui-Shin Fran, Kung-Tung Pan, Chun-Hui Tsai
  • Patent number: 7218064
    Abstract: A cold cathode flat fluorescent lamp and a driving method for a cold cathode flat fluorescent lamp are provided. The cold cathode flat fluorescent lamp includes a lamp, a transformer and a full-bridge circuit. The lamp has at least a first electrode having a first voltage and a second electrode having a second voltage. The transformer has a primary side and a secondary side, and the full-bridge circuit is used for driving the lamp. In addition, the transformer is connected to the lamp on the secondary side and is connected to the full-bridge circuit on the primary side.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: May 15, 2007
    Assignee: Delta Optoelectronics, Inc.
    Inventors: Jin-Chyuan Hung, Chang-Chun Hsiao, Chuan-Chi Hsu, Kung-Tung Pan, Yui-Shin Fran
  • Publication number: 20070103088
    Abstract: A startup method for a mercury-free flat-fluorescent lamp is provided, which comprises providing a train of voltage pulses for driving the lamp; and changing the duty circle, switching frequency, and/or operation voltage level of the driven voltage pulse during the startup period of the lamp. The above factors are properly combined to achieve the rapid ignition, the uniform light up, and the lower startup current.
    Type: Application
    Filed: August 1, 2006
    Publication date: May 10, 2007
    Applicant: DELTA OPTOELECTRONICS, INC.
    Inventors: Chun-Hui Tsai, Jin-Chyuan Hung, Chang-Chun Hsiao, Yui-Shin Fran
  • Publication number: 20070080648
    Abstract: A driving method of a cold cathode fluorescent flat lamp (CCFFL) for improving the light emitting uniformity of the cold cathode fluorescent flat lamp (CCFFL) is provided. First, a plurality of first light emitting areas and a plurality of second light emitting areas are generated alternately by the cold cathode fluorescent flat lamp (CCFFL). It is noted that the first light emitting areas and the second light emitting areas are not completely overlapped, and a frequency of alternately generating the first light emitting areas and the second light emitting areas is higher than a range that can be viewed as separate elements by unaided human eye.
    Type: Application
    Filed: December 11, 2006
    Publication date: April 12, 2007
    Applicant: DELTA OPTOELECTRONICS, INC.
    Inventors: Yui-Shin Fran, Lai-Cheng Chen
  • Patent number: 7148626
    Abstract: A flat lamp structure is disclosed. The flat lamp structure includes a gas discharge chamber, a fluorescence substance, a discharge gas, and a plurality of electrodes. The fluorescence substance is disposed on the inner wall of the gas discharge chamber, and the discharge gas is disposed in the gas discharge chamber. The electrodes are disposed on the outer wall of the gas discharge chamber, wherein the gas discharge chamber comprises a dielectric substrate, a plate, and a plurality of rods, and the plate is disposed on the upper portion of the dielectric substrate and the rods are disposed between the plate and the dielectric substrate, and the plate and the edge of dielectric are connected. Additionally, the gas discharge chamber, for example, can dispose with at least a spacer to enhance the strength of the gas discharge chamber.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: December 12, 2006
    Assignee: Delta Optoelectronics, Inc.
    Inventors: Yui-Shin Fran, Lai-Cheng Chen, Cheng-Yi Chang, Chien-Chung Wu, Jui-Hsia Chen, Jer-Shien Yang
  • Publication number: 20060226791
    Abstract: The present invention relates to a method adopting square voltage waveform for driving a flat lamp used as the light source of a flat panel display or a common light fixture, the method comprising steps of: using a power unit to convert direct current into voltage of square waveform; using a voltage booster to raise the crest of the square voltage waveform to a specific trigger voltage capable of turning on the flat lamp; and providing a pulse-type current while enabling the pulse-type current to be just larger enough to break the dielectric barrier of the flat lamp.
    Type: Application
    Filed: May 1, 2006
    Publication date: October 12, 2006
    Inventors: Jin-Chyuan Hung, Qiuka Huang, Jianping Ying, Ching-Ho Chou, Kung-Tung Pan, Yui-Shin Fran
  • Publication number: 20060220521
    Abstract: An electrode structure is provided. The electrode structure contains a first auxiliary electrode and a second auxiliary electrode, a first edge electrode and a second edge electrode disposed between the first auxiliary electrode and the second auxiliary electrode, wherein the first edge electrode forming an electrode pair with the first auxiliary electrode and having a same polarity as that of the first auxiliary electrode and the second edge electrode forming an electrode pair with the second auxiliary electrode and having a same polarity as that of the second auxiliary electrode, and at least one middle electrode disposed between the first edge electrode and the second edge electrode. The electrode structure respectively enhance an interaction between the first edge electrode and the second edge electrode and a neighboring electrode by means of the first auxiliary electrode and the second auxiliary electrode. Alternatively, the width of the edge electrode increase to be 1.
    Type: Application
    Filed: February 14, 2006
    Publication date: October 5, 2006
    Applicant: Delta Optoelectronics, Inc.
    Inventors: Jer-Shien Yang, Yen-Shan Chuang, Jen-Shou Cheng, Yui-Shin Fran
  • Publication number: 20060181223
    Abstract: A cold cathode flat fluorescent lamp and a driving method for a cold cathode flat fluorescent lamp are provided. The cold cathode flat fluorescent lamp includes a lamp, a transformer and a full-bridge circuit. The lamp has at least a first electrode having a first voltage and a second electrode having a second voltage. The transformer has a primary side and a secondary side, and the full-bridge circuit is used for driving the lamp. In addition, the transformer is connected to the lamp on the secondary side and is connected to the full-bridge circuit on the primary side.
    Type: Application
    Filed: November 15, 2005
    Publication date: August 17, 2006
    Applicant: DELTA OPTOELECTRONICS, INC.
    Inventors: Jin-Chyuan Hung, Chang-Chun Hsiao, Chuan-Chih Hsu, Kung-Tung Pan, Yui-Shin Fran
  • Publication number: 20060114373
    Abstract: A planar light source including a transflective film, a plurality of cold cathode fluorescence flat lamps and at least one reflective component to provide a uniform light source is described. A portion of the light emitted from the emitting areas of the cold cathode fluorescence flat lamps passes through the transflective film, and the other portion of the light is reflected to the reflective component by the transflective film. Then, the light is reflected to the dark areas between the emitting areas to compensate the brightness of the dark areas. When the brightness of the dark areas is compensated, the planar light source provides a uniform light without dark stripes.
    Type: Application
    Filed: March 28, 2005
    Publication date: June 1, 2006
    Inventors: Yu-Chi Liu, Wen-Chi Wu, Yuan-Wen Liu, Kung-Tung Pan, Yui-Shin Fran
  • Publication number: 20060012305
    Abstract: A cold cathode flat fluorescent lamp (CCFFL) comprising a flat lamp chamber, fluorescent substance, discharge gas, and a patterned electrode is provided. The discharge gas is disposed in the gas discharge chamber. The fluorescent substance is disposed over the inner wall of the gas discharge chamber. The patterned electrode is disposed over a surface of the flat lamp chamber. In an embodiment, the patterned electrode comprises anode pairs and cathode pairs which are alternately arranged. Each anode pair comprises a first meandering anode with first protrusions and a second meandering anode with second protrusions, wherein the first protrusions and the second protrusions are staggered. Each cathode pair comprises a first meandering cathode with third protrusions and a second meandering cathode with fourth protrusions, wherein each third protrusion aligns with each second protrusion, and each fourth protrusion aligns with each first protrusion.
    Type: Application
    Filed: May 25, 2005
    Publication date: January 19, 2006
    Inventors: Yui-Shin Fran, Kung-Tung Pan, Chun-Hui Tsai
  • Publication number: 20050225227
    Abstract: A cold cathode fluorescent flat lamp (CCFFL) comprising a cavity, a fluorescence material, a discharge gas, at least one first electrode pair and at least one second electrode pair is provided. The cavity comprises a first inner wall and a second inner wall opposite to the first inner wall or disposed on an outer wall of the cavity. The fluorescence material is disposed over the inner wall of the cavity, and the discharge gas is disposed inside the cavity. The first and second electrode pairs are disposed over the first and second inner wall respectively, and each first and second electrode pairs comprise a first light emitting area and a second light emitting area respectively. The first electrode pair and second electrode pair may be outside the cavity. The first light emitting area and the second light emitting area are not completely overlapped, therefore the non-illuminating area in-between may be compensated.
    Type: Application
    Filed: June 11, 2004
    Publication date: October 13, 2005
    Inventors: Yui-Shin Fran, Lai-Cheng Chen
  • Publication number: 20050185414
    Abstract: A cold cathode fluorescent flat lamp comprising a cavity, discharge gas, a plurality of electrodes, fluorescence layer and first light control layer is provided. The cavity has a light exit plane. The discharge gas is filled inside the cavity, and the electrodes may be disposed inside the cavity or outside the cavity. The cavity is divided by the protrusions of the electrodes into a plurality of first light emitting areas and second light emitting areas. The fluorescence layer is disposed on the inner wall of the cavity. The first light control layer is disposed over the fluorescence layer corresponding to the first light emitting area and the light exit plane of the cavity for reducing the light transmittance corresponding to the first light emitting area. Therefore, the first or second light control layers can increase the brightness uniformity of the whole cold cathode fluorescent flat lamp.
    Type: Application
    Filed: April 29, 2004
    Publication date: August 25, 2005
    Inventors: YUI-SHIN FRAN, JER-SHIEN YANG, SHIH-YUAN HUANG, LAI-CHENG CHEN