Patents by Inventor Yuichi Asano

Yuichi Asano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7646089
    Abstract: A semiconductor package including a substrate with a semiconductor device mounted on the substrate and a resin member sealing the substrate and semiconductor device. The resin member includes a first surface and a second surface located on the other side of the first surface and a plurality of leads electrically connected with the semiconductor device. The leads project from the resin member and extend to the second surface side; wherein the second surface of the resin member includes a first area having a first concave portion and a second area having a second concave portion which is different from the first area, and the second concave portion is deeper than the first concave portion.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: January 12, 2010
    Assignee: Fujitsu Limited
    Inventors: Futoshi Fukaya, Yuichi Asano, Yoshinori Niwa
  • Publication number: 20090317177
    Abstract: The present invention provides a constant velocity universal joint having a recess-projection engagement configuration in which backlash at a shaft connecting region does not easily occur, and an inner joint component and a shaft can be firmly connected. In the constant velocity universal joint of the present invention, the inner joint component and the shaft 5 fitted into an axis hole 22 of the inner joint component are connected by the recess-projection engagement configuration. Engagement contacting regions 38 of projections 35 and recesses 36 corresponding thereto are in close contact over the whole region.
    Type: Application
    Filed: January 17, 2008
    Publication date: December 24, 2009
    Inventors: Tohru Nakagawa, Yuichi Asano, Hiroshi Kawamura, Kiyoshige Yamauchi, Masahiro Ozawa, Kisao Yamazaki, Taku Itagaki
  • Publication number: 20090283897
    Abstract: A semiconductor package including a substrate with a semiconductor device mounted on the substrate and a resin member sealing the substrate and semiconductor device. The resin member includes a first surface and a second surface located on the other side of the first surface and a plurality of leads electrically connected with the semiconductor device. The leads project from the resin member and extend to the second surface side; wherein the second surface of the resin member includes a first area having a first concave portion and a second area having a second concave portion which is different from the first area, and the second concave portion is deeper than the first concave portion.
    Type: Application
    Filed: May 15, 2008
    Publication date: November 19, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Futoshi FUKAYA, Yuichi ASANO, Yoshinori NIWA
  • Publication number: 20090162134
    Abstract: The present invention firmly connects an inner joint component and a shaft of a constant velocity universal joint, making it difficult for backlash to occur. An axis hole inner diameter 26 of an inner member 20 of the constant velocity universal joint is unhardened, and a spline 54 serving as a recess and projection section running along a circumferential direction is formed on an axial end outer diameter 52 of the shaft 50. A hardened layer n is formed on the axial end outer diameter 52 of the shaft 50. The shaft 50 and the inner member 20 are joined by an axial end of the shaft 50 being pressed into the axis hole inner diameter of the inner member 20 to incuse a shape of said recess and projection section onto the axis hole inner diameter 26 of the inner member 20.
    Type: Application
    Filed: April 12, 2007
    Publication date: June 25, 2009
    Inventors: Yoshikazu Fukumura, Hisaaki Kura, Shin Tomogami, Tohru Nakagawa, Yuichi Asano
  • Publication number: 20070010046
    Abstract: In a method of manufacturing a semiconductor device of the invention, a rigid substrate which supports one or more semiconductor elements on a surface of the substrate and is clamped between an upper mold and a lower mold of an encapsulation mold at a time of resin encapsulation is provided, so that a vent-end edge portion of the substrate corresponding to a vent end of the encapsulation mold has a thickness smaller than a thickness of other portions of the substrate. The substrate is disposed in the encapsulation mold, and resin is injected into a cavity between the upper mold and the substrate to encapsulate the semiconductor elements with the resin.
    Type: Application
    Filed: September 7, 2006
    Publication date: January 11, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Youhei Nagahama, Katsunori Wako, Yuichi Asano, Masanori Takahashi, Haruo Kojima, Masamichi Fujimoto, Hiroshi Ohtsubo, Yuki Yasuda
  • Patent number: 7122402
    Abstract: In a method of manufacturing a semiconductor device of the invention, a rigid substrate which supports one or more semiconductor elements on a surface of the substrate and is clamped between an upper mold and a lower mold of an encapsulation mold at a time of resin encapsulation is provided, so that a vent-end edge portion of the substrate corresponding to a vent end of the encapsulation mold has a thickness smaller than a thickness of other portions of the substrate. The substrate is disposed in the encapsulation mold, and resin is injected into a cavity between the upper mold and the substrate to encapsulate the semiconductor elements with the resin.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: October 17, 2006
    Assignee: Fujitsu Limited
    Inventors: Youhei Nagahama, Katsunori Wako, Yuichi Asano, Masanori Takahashi, Haruo Kojima, Masamichi Fujimoto, Hiroshi Ohtsubo, Yuki Yasuda
  • Publication number: 20050070051
    Abstract: In a method of manufacturing a semiconductor device of the invention, a rigid substrate which supports one or more semiconductor elements on a surface of the substrate and is clamped between an upper mold and a lower mold of an encapsulation mold at a time of resin encapsulation is provided, so that a vent-end edge portion of the substrate corresponding to a vent end of the encapsulation mold has a thickness smaller than a thickness of other portions of the substrate. The substrate is disposed in the encapsulation mold, and resin is injected into a cavity between the upper mold and the substrate to encapsulate the semiconductor elements with the resin.
    Type: Application
    Filed: February 20, 2004
    Publication date: March 31, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Youhei Nagahama, Katsunori Wako, Yuichi Asano, Masanori Takahashi, Haruo Kojima, Masamichi Fujimoto, Hiroshi Ohtsubo, Yuki Yasuda
  • Patent number: 6222258
    Abstract: A method for producing a semiconductor device includes: a) an attaching process in which a flat-plate member is positioned on a flat-shape lead frame provided with a plurality of leads and a plurality of support bars so that the flat-plate member contacts at least the plurality of leads, and the flat-plate member is attached to plurality of support bars; b) an element mounting process in which a semiconductor element is mounted on the flat-plate member attached to the plurality of support bars of the flat-shape lead frame; c) a wire-bonding process in which a wire is provided between each of the plurality of leads and the semiconductor element; and d) a separating process, performed after the completion of the wire-bonding process, in which the plurality of support bars are deformed so as to separate the flat-plate member and the plurality of leads and electrically disconnect or separate the flat-plate member from the plurality of leads.
    Type: Grant
    Filed: June 22, 1998
    Date of Patent: April 24, 2001
    Assignee: Fujitsu Limited
    Inventors: Yuichi Asano, Hitoshi Kobayashi, Katsunori Wako
  • Patent number: 6199525
    Abstract: A camshaft drive arrangement for an internal combustion engine wherein the drive includes first and second intermediate shafts journaled directly within the cylinder block. The first intermediate shaft is driven directly to the crankshaft and the second intermediate shaft is driven from the first intermediate shaft by a flexible transmitter drive. The second intermediate shaft drives a camshaft journaled in the cylinder head by a second flexible transmitter drive.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: March 13, 2001
    Assignee: Yamaha Hatsudoki Kabushiki Kaisha
    Inventors: Hitoshi Uema, Yuichi Asano
  • Patent number: 5929513
    Abstract: The present invention relates to a semiconductor device in which inner leads of a lead frame are electrically connected to a semiconductor chip, a method for producing thereof and a lead frame used therein. The object of the present invention is to improve a strength of the lead frame and a heat release efficiency in a small-size multi-pin type semiconductor device. In the inner lead of the lead frame, a thin plate portion is formed. The thin plate portions are secured on a heat spreader. A semiconductor chip is mounted on the heat spreader. The semiconductor chip is bonded to the thin plate portions of the inner leads through wires.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: July 27, 1999
    Assignee: Fujitsu Limited
    Inventors: Yuichi Asano, Akihiro Kubota, Koichi Sibasaki, Kazuhiro Yonetake, Tsuyoshi Aoki
  • Patent number: 5834831
    Abstract: A thin semiconductor device in which a strength of a lead frame and a heat dissipation efficiency can be improved. The semiconductor device has a semiconductor chip, a lead having an inner lead and an a outer lead continuing to the inner lead, said inner lead having a thin plate portion thinner than the other portion therof, said thin plate portion being electrically connected to said semiconductor chip through a wire and said outer lead serving as an outer connecting terminal, and a sealing resin sealing said semiconductor chip and at least a part of said lead, wherin said inner lead of said lead is positioned on said semiconductor chip.
    Type: Grant
    Filed: March 1, 1996
    Date of Patent: November 10, 1998
    Assignee: Fujitsu Limited
    Inventors: Akihiro Kubota, Yuichi Asano, Koichi Sibasaki, Kazuhiro Yonetake, Tsuyoshi Aoki, Akira Takashima
  • Patent number: 5804469
    Abstract: A method for producing a semiconductor device includes: a) an attaching process in which a flat-plate member is positioned on a flat-shape lead frame provided with a plurality of leads and a plurality of support bars so that the flat-plate member contacts at least the plurality of leads, and the flat-plate member is attached to plurality of support bars; b) an element mounting process in which a semiconductor element is mounted on the flat-plate member attached to the plurality of support bars of the flat-shape lead frame; c) a wire-bonding process in which a wire is provided between each of the plurality of leads and the semiconductor element; and d) a separating process, performed after the completion of the wire-bonding process, in which the plurality of support bars are deformed so as to separate the flat-plate member and the plurality of leads and electrically disconnect or separate the flat-plate member from the plurality of leads.
    Type: Grant
    Filed: April 18, 1997
    Date of Patent: September 8, 1998
    Assignee: Fujitsu Limited
    Inventors: Yuichi Asano, Hitoshi Kobayashi, Katsunori Wako
  • Patent number: 5693571
    Abstract: There is provided a mounting construction which prevents leads of a semiconductor device from being short circuited when the semiconductor device is mounted on a mounting board so that mountability of the semiconductor device is improved. A plurality of outer leads extend from sides of a package of the semiconductor device. A mounting board has a surface on which a plurality of terminals to be electrically connected to the semiconductor device are provided. A mounting member is mounted on the mounting board separately from the semiconductor device. The semiconductor device is attached to the mounting member. The mounting member has a frame member forming a space in which the semiconductor device is placed. A first connecting lead has a first lead connecting portion and a first external connecting portion to be connected to a one of terminals provided on the mounting board. The first external connecting portion extends along a bottom surface of the frame member.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: December 2, 1997
    Assignee: Fujitsu Limited
    Inventors: Hitoshi Kobayashi, Yuichi Asano, Kenji Kobayashi, Kenichi Sasaki, Yuji Sakurai
  • Patent number: 5557145
    Abstract: There is provided a mounting construction which prevents leads of a semiconductor device from being short circuited when the semiconductor device is mounted on a mounting board so that mountability of the semiconductor device is improved. A plurality of outer leads extend from sides of a package of the semiconductor device. A mounting board has a surface on which a plurality of terminals to be electrically connected to the semiconductor device are provided. A mounting member is mounted on the mounting board separately from the semiconductor device. The semiconductor device is attached to the mounting member. The mounting member has a frame member forming a space in which the semiconductor device is placed. A first connecting lead has a first lead connecting portion and a first external connecting portion to be connected to a one of terminals provided on the mounting board. The first external connecting portion extends along a bottom surface of the frame member.
    Type: Grant
    Filed: March 9, 1995
    Date of Patent: September 17, 1996
    Assignee: Fujitsu Limited
    Inventors: Hitoshi Kobayashi, Yuichi Asano, Kenji Kobayashi, Kenichi Sasaki, Yuji Sakurai