Patents by Inventor Yuichi Harano

Yuichi Harano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8338272
    Abstract: A wafer is mounted on the top surface of the stage having an electrostatic chuck function, and the wafer at 50° C. or more is cooled to a temperature lower than 50° C. In this step, the voltage to be applied to the internal electrode provided in the stage is raised stepwise to gradually increase the contact area between the back surface of the wafer and the top surface of the stage. Finally, a chuck voltage is applied to the internal electrode, so that the entire back surface of the wafer is uniformly attracted to the top surface of the stage. This reduces damage occurring in the top surface of the stage due to rubbing between the back surface of the wafer and the top surface of the stage.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: December 25, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Yuichi Harano, Hidenori Suzuki
  • Publication number: 20110127158
    Abstract: In a copper damascene wiring process, a tantalum-based laminated film, which is used as a barrier metal film, is continuously formed in a sputtering deposition chamber. When the continuous deposition process is discontinuously applied to a number of wafers, a tantalum film and a tantalum nitride film which are relatively thin are alternately deposited over an inner surface of a shield in a sputter deposition chamber, which results in a thickness of the deposited film being on the order of several thousand nanometers. The deposited film peels off due to internal stress therein to generate foreign material or particles. To counteract this, a tantalum film, which is much thicker than the tantalum film formed over the wafer at one time, is formed over the substantially inner wall of the chamber at predetermined intervals when repeatedly depositing the tantalum nitride film and the tantalum film in the sputtering deposition chamber.
    Type: Application
    Filed: November 5, 2010
    Publication date: June 2, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Takashi HAMAYA, Hidenori SUZUKI, Yuichi HARANO, Masahiko ITO
  • Publication number: 20100055879
    Abstract: A wafer is mounted on the top surface of the stage having an electrostatic chuck function, and the wafer at 50° C. or more is cooled to a temperature lower than 50° C. In this step, the voltage to be applied to the internal electrode provided in the stage is raised stepwise to gradually increase the contact area between the back surface of the wafer and the top surface of the stage. Finally, a chuck voltage is applied to the internal electrode, so that the entire back surface of the wafer is uniformly attracted to the top surface of the stage. This reduces damage occurring in the top surface of the stage due to rubbing between the back surface of the wafer and the top surface of the stage.
    Type: Application
    Filed: June 8, 2009
    Publication date: March 4, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Yuichi HARANO, Hidenori SUZUKI
  • Patent number: 7479451
    Abstract: The present invention prevents the diffusion of an aluminum element into a polysilicon layer in a heating step when an aluminum-based conductive layer is used in a source/drain electrode which is in contact with low-temperature polysilicon whereby the occurrence of defective display can be obviated. An aluminum-based conductive layer is used in a source/drain electrode and a barrier layer made of molybdenum or a molybdenum alloy layer is formed between the aluminum-based conductive layer and a polysilicon layer. Further, a molybdenum oxide nitride film formed by the rapid heat treatment (rapid heat annealing) in a nitrogen atmosphere is formed over a surface of the molybdenum or the molybdenum alloy which constitutes the barrier layer.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: January 20, 2009
    Assignee: Hitachi Displays, Ltd.
    Inventors: Yuichi Harano, Jun Gotoh, Toshiki Kaneko, Masanao Yamamoto
  • Publication number: 20050249525
    Abstract: An endless belt transports a recording medium through image forming sections and transfers toner images from corresponding ones of the image forming sections onto the recording medium. The endless belt has a surface resistivity and a volume resistivity. The surface resistivity and the volume resistivity are related such that 0.3 ?(log ? s?log ? v)?1.3 where ? s is the surface resistivity in ?/? measured after a voltage of substantially 500 V is applied to the endless belt for ten seconds and ? v is the volume resistivity in ?·cm ten after a voltage of substantially 250 V is applied to the endless belt for ten seconds.
    Type: Application
    Filed: July 13, 2005
    Publication date: November 10, 2005
    Inventors: Yuichi Harano, Jun Gotoh, Toshiki Kaneko, Masanao Yamamoto
  • Publication number: 20050250273
    Abstract: The present invention prevents the diffusion of an aluminum element into a polysilicon layer in a heating step when an aluminum-based conductive layer is used in a source/drain electrode which is in contact with low-temperature polysilicon whereby the occurrence of defective display can be obviated. An aluminum-based conductive layer is used in a source/drain electrode and a barrier layer made of molybdenum or a molybdenum alloy layer is formed between the aluminum-based conductive layer and a polysilicon layer. Further, a molybdenum oxide nitride film formed by the rapid heat treatment (rapid heat annealing) in a nitrogen atmosphere is formed over a surface of the molybdenum or the molybdenum alloy which constitutes the barrier layer.
    Type: Application
    Filed: July 14, 2005
    Publication date: November 10, 2005
    Inventors: Yuichi Harano, Jun Gotoh, Toshiki Kaneko, Masanao Yamamoto
  • Patent number: 6933525
    Abstract: The present invention prevents the diffusion of an aluminum element into a polysilicon layer in a heating step when an aluminum-based conductive layer is used in a source/drain electrode which is in contact with low-temperature polysilicon whereby the occurrence of defective display can be obviated. An aluminum-based conductive layer is used in a source/drain electrode and a barrier layer made of molybdenum or a molybdenum alloy layer is formed between the aluminum-based conductive layer and a polysilicon layer. Further, a molybdenum oxide nitride film formed by the rapid heat treatment (rapid heat annealing) in a nitrogen atmosphere is formed over a surface of the molybdenum or the molybdenum alloy which constitutes the barrier layer.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: August 23, 2005
    Assignee: Hitachi Displays, Ltd.
    Inventors: Yuichi Harano, Jun Gotoh, Toshiki Kaneko, Masanao Yamamoto
  • Publication number: 20040135143
    Abstract: The present invention prevents the diffusion of an aluminum element into a polysilicon layer in a heating step when an aluminum-based conductive layer is used in a source/drain electrode which is in contact with low-temperature polysilicon whereby the occurrence of defective display can be obviated. An aluminum-based conductive layer is used in a source/drain electrode and a barrier layer made of molybdenum or a molybdenum alloy layer is formed between the aluminum-based conductive layer and a polysilicon layer. Further, a molybdenum oxide nitride film formed by the rapid heat treatment (rapid heat annealing) in a nitrogen atmosphere is formed over a surface of the molybdenum or the molybdenum alloy which constitutes the barrier layer.
    Type: Application
    Filed: December 23, 2003
    Publication date: July 15, 2004
    Applicant: Hitachi Displays, Ltd.
    Inventors: Yuichi Harano, Jun Gotoh, Toshiki Kaneko, Masanao Yamamoto
  • Patent number: 6433842
    Abstract: The method of fabrication of a liquid crystal display device includes the steps of: forming a metal thin film on a glass substrate; forming a resist pattern on the metal thin film by photolithography; and wet-etching the metal thin film with an etchant formed of a mixture including phosphoric acid, nitric acid in a range between 7 mol % and 12 mol % inclusive, and at least one of ammonium fluoride and hydrogen fluoride in a trace amount of about 0.01 to 0.1 mol %.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: August 13, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Toshiki Kaneko, Masaru Takabatake, Takahiro Ochiai, Takuya Takahashi, Katsumi Tamura, Kenichi Onisawa, Kenichi Cyahara, Masatomo Terakado, Yuichi Harano, Hideaki Yamamoto